index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
clk
/
clk-xgene.c
Age
Commit message (
Expand
)
Author
Files
Lines
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 156
Thomas Gleixner
1
-16
/
+1
2019-04-23
clk: core: replace clk_{readl,writel} with {readl,writel}
Jonas Gorski
1
-3
/
+3
2017-11-14
clk: clk-xgene: Adjust six checks for null pointers
Markus Elfring
1
-6
/
+6
2017-11-14
clk: clk-xgene: Delete error messages for failed memory allocations
Markus Elfring
1
-6
/
+2
2017-07-22
clk: Convert to using %pOF instead of full_name
Rob Herring
1
-9
/
+6
2016-10-28
clk: xgene: Don't call __pa on ioremaped address
Laura Abbott
1
-6
/
+4
2016-09-14
clk: xgene: Add PMD clock
Hoan Tran
1
-0
/
+221
2016-04-16
clk: xgene: Remove CLK_IS_ROOT
Stephen Boyd
1
-1
/
+1
2016-03-03
clk: xgene: Add missing parenthesis when clearing divider value
Loc Ho
1
-2
/
+2
2016-01-29
clk: xgene: Remove return from void function
Stephen Boyd
1
-1
/
+1
2016-01-29
clk: xgene: Add SoC and PMD PLL clocks with v2 hardware
Loc Ho
1
-37
/
+66
2015-11-20
clk: xgene: Fix divider with non-zero shift value
Loc Ho
1
-1
/
+2
2015-10-16
clk: xgene: Remove unused setup.h include
Stephen Boyd
1
-1
/
+0
2015-08-25
clk: Convert __clk_get_name(hw->clk) to clk_hw_get_name(hw)
Stephen Boyd
1
-11
/
+11
2015-07-07
clk: xgene: Delete duplicated name field
Matthias Brugger
1
-15
/
+13
2015-05-15
clk: xgene: Silence sparse warnings
Stephen Boyd
1
-10
/
+12
2013-10-07
clk: Add APM X-Gene SoC clock driver
Loc Ho
1
-0
/
+521