starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2021-06-09	clk: vc5: fix output disabling when enabling a FOD	Luca Ceresoli	1	-3/+24
2021-02-11	clk: vc5: Add support for optional load capacitance	Adam Ford	1	-0/+64
2020-12-20	clk: vc5: Use "idt,voltage-microvolt" instead of "idt,voltage-microvolts"	Geert Uytterhoeven	1	-2/+2
2020-07-24	clk: vc5: use a dedicated struct to describe the output drivers	Luca Ceresoli	1	-9/+15
2020-07-23	clk: vc5: Add memory check to prevent oops	Adam Ford	1	-3/+5
2020-07-23	clk: vc5: fix use of memory after it has been kfree'd	Colin Ian King	1	-32/+18
2020-06-23	clk: vc5: Enable addition output configurations of the Versaclock	Adam Ford	1	-0/+156
2020-06-23	clk: vc5: Allow Versaclock driver to support multiple instances	Adam Ford	1	-47/+37
2020-05-30	clk: vc5: Add support for IDT VersaClock 5P49V6965	Adam Ford	1	-0/+11
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 157	Thomas Gleixner	1	-10/+1
2019-01-09	clk: vc5: Abort clock configuration without upstream clock	Marek Vasut	1	-1/+3
2018-12-15	clk: vc5: Add suspend/resume support	Marek Vasut	1	-0/+25
2017-07-17	clk: vc5: Add support for IDT VersaClock 5P49V5925	Vladimir Barinov	1	-0/+11
2017-07-17	clk: vc5: Add support for IDT VersaClock 5P49V6901	Marek Vasut	1	-0/+11
2017-07-17	clk: vc5: Add support for the input frequency doubler	Marek Vasut	1	-1/+77
2017-07-17	clk: vc5: Split clock input mux and predivider	Marek Vasut	1	-12/+34
2017-07-17	clk: vc5: Configure the output buffer input mux on prepare	Marek Vasut	1	-0/+19
2017-07-17	clk: vc5: Do not warn about disabled output buffer input muxes	Marek Vasut	1	-0/+3
2017-07-17	clk: vc5: Fix trivial typo	Marek Vasut	1	-1/+1
2017-07-17	clk: vc5: Prevent division by zero on unconfigured outputs	Marek Vasut	1	-0/+4
2017-04-19	clk: vc5: Add support for IDT VersaClock 5P49V5935	Alexey Firago	1	-2/+13
2017-04-19	clk: vc5: Add structure to describe particular chip features	Alexey Firago	1	-18/+47
2017-01-21	clk: vc5: Add support for IDT VersaClock 5P49V5923 and 5P49V5933	Marek Vasut	1	-0/+791