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path: root/drivers/clk/clk-versaclock5.c
AgeCommit message (Expand)AuthorFilesLines
2018-12-15clk: vc5: Add suspend/resume supportMarek Vasut1-0/+25
2017-07-17clk: vc5: Add support for IDT VersaClock 5P49V5925Vladimir Barinov1-0/+11
2017-07-17clk: vc5: Add support for IDT VersaClock 5P49V6901Marek Vasut1-0/+11
2017-07-17clk: vc5: Add support for the input frequency doublerMarek Vasut1-1/+77
2017-07-17clk: vc5: Split clock input mux and predividerMarek Vasut1-12/+34
2017-07-17clk: vc5: Configure the output buffer input mux on prepareMarek Vasut1-0/+19
2017-07-17clk: vc5: Do not warn about disabled output buffer input muxesMarek Vasut1-0/+3
2017-07-17clk: vc5: Fix trivial typoMarek Vasut1-1/+1
2017-07-17clk: vc5: Prevent division by zero on unconfigured outputsMarek Vasut1-0/+4
2017-04-19clk: vc5: Add support for IDT VersaClock 5P49V5935Alexey Firago1-2/+13
2017-04-19clk: vc5: Add structure to describe particular chip featuresAlexey Firago1-18/+47
2017-01-21clk: vc5: Add support for IDT VersaClock 5P49V5923 and 5P49V5933Marek Vasut1-0/+791
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