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path: root/drivers/clk/clk-si5351.c
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2017-12-28clk: si5351: _si5351_clkout_reset_pll() can be staticWu Fengguang1-1/+1
Fixes: b26ff127c52c ("clk: si5351: Apply PLL soft reset before enabling the outputs") Signed-off-by: Fengguang Wu <fengguang.wu@intel.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-22clk: si5351: Do not enable parent clocks on probeSergej Sawazki1-26/+9
The si5351 driver should not prepare or enable other clocks in the tree on probe. Let the clients decide when to prepare or enable the clocks. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Sergej Sawazki <ce3a@gmx.de> [sboyd@codeaurora.org: Remove most of the .remove function too] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-22clk: si5351: Rename internal plls to avoid name collisionsSergej Sawazki1-1/+1
This drivers probe fails due to a clock name collision if a clock named 'plla' or 'pllb' is already registered when registering this drivers internal plls. Fix it by renaming internal plls to avoid name collisions. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Signed-off-by: Sergej Sawazki <sergej@taudac.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-22clk: si5351: Apply PLL soft reset before enabling the outputsSergej Sawazki1-0/+29
The "Si5351A/B/C Data Sheet" states to apply a PLL soft reset before enabling the output clocks [1]. This is required to get a deterministic phase relationship between the output clocks. Without resetting the PLL, the phase relationship between the clocks is unpredictable. Fix this by resetting the PLL in si5351_clkout_prepare(). References: [1] https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351-B.pdf Figure 12 ("I2C Programming Procedure") Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Sergej Sawazki <sergej@taudac.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-22clk: si5351: Add DT property to enable PLL resetSergej Sawazki1-0/+3
Add optional output clock DT property to enable PLL reset when a clock output is enabled. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Rabeeh Khoury <rabeeh@solid-run.com> Cc: Russell King <linux@armlinux.org.uk> Signed-off-by: Sergej Sawazki <sergej@taudac.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-12-22clk: si5351: implement remove handlerAlexey Khoroshilov1-0/+13
The driver has no remove function, so it does not cleanup resources that are not under devm management. Found by Linux Driver Verification project (linuxtesting.org). Signed-off-by: Alexey Khoroshilov <khoroshilov@ispras.ru> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-09-02clk: si5351: fix PLL resetRussell King1-7/+5
Changing the audio sample rate on the SolidRun Cubox disrupts the video output. The Si5351 provides both the video clock (using PLLA on output 0) and the audio clock (using PLLB on output 2). When the rate of clock output 2 is changed, it reconfigures PLLB, which results in both PLLA and PLLB being reset. The reset of PLLA causes clock output 0 to be disrupted, thereby causing a loss of sync by the attached display device. Hence, each time the audio sample rate changes (eg, when a video player starts up, or when starting to play music) the video display momentarily blanks while the Si5351 settles down. Prior to the commit below, this behaviour did not happen. Fix this by only resetting only the PLL which has been changed. Fixes: 6dc669a22c77 ("clk: si5351: Add PLL soft reset") Signed-off-by: Russell King <rmk+kernel@armlinux.org.uk> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-22clk: si5351: Delete an error message for a failed memory allocation in ↵Markus Elfring1-3/+1
si5351_i2c_probe() The script "checkpatch.pl" pointed information out like the following. * CHECK: Comparison to NULL could be written "!drvdata" Thus adjust this expression. * WARNING: Possible unnecessary 'out of memory' message Thus remove such a statement here. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2017-04-22clk: si5351: Use devm_kcalloc() in si5351_i2c_probe()Markus Elfring1-2/+2
Multiplications for the size determination of memory allocations indicated that array data structures should be processed. Thus use the corresponding function "devm_kcalloc". This issue was detected by using the Coccinelle software. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-08-25clk: si5351: Migrate to clk_hw based OF and registration APIsStephen Boyd1-30/+41
Now that we have clk_hw based provider APIs to register clks, we can get rid of struct clk pointers while registering clks in these drivers, allowing us to move closer to a clear split of consumer and provider clk APIs. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Guenter Roeck <linux@roeck-us.net> Cc: Sören Brinkmann <soren.brinkmann@xilinx.com> Cc: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Stephen Boyd <stephen.boyd@linaro.org> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2016-03-03clk: si5{14,351,70}: Remove CLK_IS_ROOTStephen Boyd1-1/+1
This flag is a no-op now. Remove usage of the flag. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Sören Brinkmann <soren.brinkmann@xilinx.com> Cc: Mike Looijmans <mike.looijmans@topic.nl> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-11-20clk: si5351: Add PLL soft resetJacob Siverskog1-0/+7
This is according to figure 12 ("I2C Programming Procedure") in "Si5351A/B/C Data Sheet" (https://www.silabs.com/Support%20Documents/TechnicalDocs/Si5351-B.pdf). Without the PLL soft reset, we were unable to get three outputs working at the same time. According to Silicon Labs support, performing PLL soft reset will only be noticeable if the PLL parameters have been changed. Signed-off-by: Jacob Siverskog <jacob@teenage.engineering> Signed-off-by: Jens Rudberg <jens@teenage.engineering> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-10-22clk: si5351: add missing of_node_putJulia Lawall1-7/+10
for_each_child_of_node performs an of_node_get on each iteration, so a break out of the loop requires an of_node_put. A simplified version of the semantic patch that fixes this problem is as follows (http://coccinelle.lip6.fr): // <smpl> @@ expression root,e; local idexpression child; @@ for_each_child_of_node(root, child) { ... when != of_node_put(child) when != e = child ( return child; | + of_node_put(child); ? return ...; ) ... } // </smpl> The resulting puts were manually moved to the end of the function for conciseness. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-08-25clk: si5351: Convert __clk_get_name() to clk_hw_get_name()Stephen Boyd1-8/+8
This driver uses __clk_get_name() when it's dealing with struct clk_hw pointers. Use the simpler form so that we can get rid of the clk member in struct clk_hw one day. Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-08-25clk: Convert __clk_get_flags() to clk_hw_get_flags()Stephen Boyd1-2/+2
Mostly converted with the following snippet: @@ struct clk_hw *E; @@ -__clk_get_flags(E->clk) +clk_hw_get_flags(E) Acked-by: Tero Kristo <t-kristo@ti.com> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: Max Filippov <jcmvbkbc@gmail.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Cc: Daniel Thompson <daniel.thompson@linaro.org> Cc: Coquelin <mcoquelin.stm32@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-07-20clk: si5351: Include clk.hStephen Boyd1-1/+1
This clock provider uses the consumer API, so include clk.h explicitly. Cc: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2015-05-13clk: si5351: fix .recalc_rate for multisynth 6-7Sergej Sawazki1-3/+2
MS6 and MS7 do not have the MSx_P3 field. Do the 'params.p3 == 0' check for MS0-M5 only. See [AN619, p. 6] for details. Referenced document: [AN619] Manually Generating an Si5351 Register Map, Rev. 0.4 Signed-off-by: Sergej Sawazki <ce3a@gmx.de> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-05-13clk: si5351: fix .round_rate for multisynth 6-7Sergej Sawazki1-4/+17
The divider calculation for multisynth 6 and 7 differs from the calculation for multisynth 0-5. For MS6 and MS7, set MSx_P1 directly, MSx_P1=divide value [AN619, p. 6]. Referenced document: [AN619] Manually Generating an Si5351 Register Map, Rev. 0.4 Signed-off-by: Sergej Sawazki <ce3a@gmx.de> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-05-08clk: si5351: Do not pass struct clk in platform_dataSebastian Hesselbarth1-18/+45
When registering clk-si5351 by platform_data, we should not pass struct clk for the reference clocks. Drop struct clk from platform_data and rework the driver to use devm_clk_get of named clock references. While at it, check for at least one valid input clock and properly prepare/ enable valid reference clocks. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Reported-by: Michael Welling <mwelling@ieee.org> Reported-by: Jean-Francois Moine <moinejf@free.fr> Reported-by: Russell King <rmk+linux@arm.linux.org.uk> Tested-by: Michael Welling <mwelling@ieee.org> Tested-by: Jean-Francois Moine <moinejf@free.fr> Signed-off-by: Michael Turquette <mturquette@linaro.org>
2015-03-27clk: si5351: Constify clock names and struct regmap_configKrzysztof Kozlowski1-5/+5
The regmap_config struct may be const because it is not modified by the driver and regmap_init() accepts pointer to const. Replace doubled const in the arrays of clock names with proper const pointer to const data. This fixes the warnings: drivers/clk/clk-si5351.c:71:25: warning: duplicate const drivers/clk/clk-si5351.c:74:25: warning: duplicate const drivers/clk/clk-si5351.c:77:25: warning: duplicate const drivers/clk/clk-si5351.c:80:25: warning: duplicate const Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com> Reviewed-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2014-01-29Merge tag 'clk-for-linus-3.14-part2' of ↵Linus Torvalds1-17/+13
git://git.linaro.org/people/mike.turquette/linux Pull more clock framework changes from Mike Turquette: "The second half of the clock framework pull requeust for 3.14 is dominated by platform support for Qualcomm's MSM SoCs, DT binding updates for TI's OMAP-ish processors and additional support for Samsung chips. Additionally there are other smaller clock driver changes and several last minute fixes. This pull request also includes the HiSilicon support that depends on the already-merged arm-soc pull request" [ Fix up stupid compile error in the source tree with evil merge - Grumpy Linus ] * tag 'clk-for-linus-3.14-part2' of git://git.linaro.org/people/mike.turquette/linux: (49 commits) clk: sort Makefile clk: sunxi: fix overflow when setting up divided factors clk: Export more clk-provider functions dt-bindings: qcom: Fix warning with duplicate dt define clk: si5351: remove variant from platform_data clk: samsung: Remove unneeded semicolon clk: qcom: Fix modular build ARM: OMAP3: use DT clock init if DT data is available ARM: AM33xx: remove old clock data and link in new clock init code ARM: AM43xx: Enable clock init ARM: OMAP: DRA7: Enable clock init ARM: OMAP4: remove old clock data and link in new clock init code ARM: OMAP2+: io: use new clock init API ARM: OMAP2+: PRM: add support for initializing PRCM clock modules from DT ARM: OMAP3: hwmod: initialize clkdm from clkdm_name ARM: OMAP: hwmod: fix an incorrect clk type cast with _get_clkdm ARM: OMAP2+: clock: use driver API instead of direct memory read/write ARM: OMAP2+: clock: add support for indexed memmaps ARM: dts: am43xx clock data ARM: dts: AM35xx: use DT clock data ...
2014-01-27clk: si5351: remove variant from platform_dataSebastian Hesselbarth1-16/+12
Commit 9807362bfe1748d9bb48eecb9261f1b1aaafea1c "clk: si5351: declare all device IDs for module loading" removed the common i2c_device_id and introduced new ones for each variant of the clock generator. Instead of exploiting that information in the driver, it still depends on platform_data passing the chips .variant. This removes the now redundant .variant from the platform_data and puts it in i2c_device_id's .driver_data instead. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-07-03Merge tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linuxLinus Torvalds1-4/+75
Pull clock framework updates from Mike Turquette: "The common clock framework changes for 3.11 include new clock drivers across several different platforms and architectures, fixes to existing drivers, a MAINTAINERS file fix and improvements to the basic clock types that allow them to be of use to more platforms than before. Only a few fixes to the core framework are included with most all of the changes landing in the various clock drivers themselves." * tag 'clk-for-linus-3.11' of git://git.linaro.org/people/mturquette/linux: (55 commits) clk: tegra: fix ifdef for tegra_periph_reset_assert inline clk: tegra: provide tegra_periph_reset_assert alternative clk: exynos4: Fix clock aliases for cpufreq related clocks clk: samsung: Add MUX_FA macro to pass flag and alias clk: add support for Rockchip gate clocks clk: vexpress: Make the clock drivers directly available for arm64 clk: vexpress: Use full node name to identify individual clocks clk: tegra: T114: add DFLL DVCO reset control clk: tegra: T114: add DFLL source clocks clk: tegra: T114: add FCPU clock shaper programming, needed by the DFLL clk: gate: add CLK_GATE_HIWORD_MASK clk: divider: add CLK_DIVIDER_HIWORD_MASK flag clk: mux: add CLK_MUX_HIWORD_MASK clk: Always notify whole subtree when reparenting MAINTAINERS: make drivers/clk entry match subdirs clk: honor CLK_GET_RATE_NOCACHE in clk_set_rate clk: use clk_get_rate() for debugfs clk: tegra: Use override bits when needed clk: tegra: override bits for Tegra30 PLLM clk: tegra: override bits for Tegra114 PLLM ...
2013-05-30clk: si5351: Set initial clkout rate when defined in platform data.Marek Belisko1-0/+10
clock-frequency property from platform data was read but never used. Apply defined rate when clock is registered. Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> [mturquette@linaro.org: add missing changelog] Cc: stable@kernel.org Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-30clk: si5351: Fix clkout rate computation.Marek Belisko1-1/+1
Rate was incorrectly computed because we read from wrong divider register. Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com> Acked-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> Cc: stable@kernel.org
2013-05-29clk: si5351: declare all device IDs for module loadingJean-Francois Moine1-1/+4
When the si5351 driver is a kernel module, it is loaded into memory from its i2c device IDs, but not from its DT compatible properties. This patch declares the i2c device IDs of all chip variants. Signed-off-by: Jean-Francois Moine <moinejf@free.fr> Acked-by: Jason Cooper <jason@lakedaemon.net> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-05-29clk: si5351: Allow user to define disabled state for every clock outputSebastian Hesselbarth1-3/+71
This patch adds platform data and DT bindings to allow to overwrite the stored disabled state for each clock output. Signed-off-by: Marek Belisko <marek.belisko@streamunlimited.com> Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
2013-04-12clk: add si5351 i2c common clock driverSebastian Hesselbarth1-0/+1510
This patch adds a common clock driver for Silicon Labs Si5351a/b/c i2c programmable clock generators. Currently, the driver does not support VXCO feature of si5351b. Passing platform_data or DT bindings selectively allows to overwrite stored Si5351 configuration which is very helpful for clock generators with empty eeprom configuration. Corresponding device tree binding documentation is also added. Signed-off-by: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> Tested-by: Daniel Mack <zonque@gmail.com> Acked-by: Guenter Roeck <linux@roeck-us.net> Tested-by: Michal Bachraty <michal.bachraty@streamunlimited.com> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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