index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
drivers
/
clk
/
at91
/
clk-peripheral.c
Age
Commit message (
Expand
)
Author
Files
Lines
2019-05-30
treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152
Thomas Gleixner
1
-6
/
+1
2019-04-25
clk: at91: allow configuring peripheral PCR layout
Alexandre Belloni
1
-22
/
+24
2018-10-17
clk: at91: move DT compatibility code to its own file
Alexandre Belloni
1
-77
/
+0
2018-10-17
clk: at91: allow clock registration from C code
Alexandre Belloni
1
-2
/
+2
2017-06-30
clk: at91: Add sama5d2 suspend/resume
Alexandre Belloni
1
-1
/
+3
2016-09-15
clk: at91: Migrate to clk_hw based registration and OF APIs
Stephen Boyd
1
-16
/
+23
2016-02-17
clk: at91: remove useless includes
Alexandre Belloni
1
-2
/
+0
2016-02-17
clk: at91: make use of syscon/regmap internally
Boris Brezillon
1
-56
/
+79
2015-10-01
clk: at91: modify PMC peripheral clock to deal with newer register layout
Nicolas Ferre
1
-6
/
+14
2015-10-01
clk: at91: cleanup PMC header file for PCR register fields
Nicolas Ferre
1
-4
/
+4
2015-08-25
clk: at91: Convert to clk_hw based provider APIs
Stephen Boyd
1
-3
/
+3
2015-06-19
clk: at91: fix PERIPHERAL_MAX_SHIFT definition
Boris Brezillon
1
-4
/
+4
2013-12-02
clk: at91: add PMC peripheral clocks
Boris BREZILLON
1
-0
/
+410