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path: root/drivers/bus/ti-sysc.c
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2020-03-10Merge branch 'fix-lcdc-quirk' into omap-for-v5.7/ti-syscTony Lindgren1-1/+2
2020-03-09bus: ti-sysc: Fix quirk flags for lcdc on am335xTony Lindgren1-1/+2
Commit adb72394e2ab ("ARM: OMAP2+: Drop legacy platform data for am3 lcdc") dropped legacy platform data but we never added the quirks for SWSUP_SIDLE and SWSUP_MSTANDBY for lcdc for ti-sysc driver. This breaks suspend/resume. Let's fix the issue by enabling the same quirks for ti-sysc driver as we had earlier with platform data. Fixes: adb72394e2ab ("ARM: OMAP2+: Drop legacy platform data for am3 lcdc") Fixes: 23731eac9848 ("bus: ti-sysc: Detect devices on am335x when DEBUG is enabled") Reported-by: Keerthy <j-keerthy@ti.com> Cc: Jyri Sarha <jsarha@ti.com> Cc: Keerthy <j-keerthy@ti.com> Cc: Dave Gerlach <d-gerlach@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Tested-by: Dave Gerlach <d-gerlach@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04bus: ti-sysc: Add support for PRUSS SYSC typeSuman Anna1-0/+27
The PRU-ICSS present on AM33xx/AM43xx/AM57xx has a very unique SYSCFG register. The register follows the OMAP4-style SYSC_TYPE3 for Master Standby and Slave Idle, but also has two additional unique fields - STANDBY_INIT and SUB_MWAIT. The STANDBY_INIT is a control bit that is used to initiate a Standby sequence (when set) and trigger a MStandby request to the SoC's PRCM module. This same bit is also used to enable the OCP master ports (when cleared) to allow the PRU cores to access any peripherals or memory beyond the PRU subsystem. The SUB_MWAIT is a ready status field for the external access. Add support for this SYSC type. The STANDBY_INIT has to be set during suspend, without which it results in a hang in the resume sequence on AM33xx/AM43xx boards and requires a board reset to come out of the hang. Any PRU applications requiring external access are supposed to clear the STANDBY_INIT bit. Note that the PRUSS context is lost during a suspend sequence because the PRUSS module is reset and/or disabled. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Roger Quadros <rogerq@ti.com> [tony@atomide.com: updated quirk define number and to use -ENODEV] Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-04bus: ti-sysc: Detect EDMA and set quirk flags for tptcTony Lindgren1-0/+5
In order to probe EDMA with ti-sysc interconnect target module and with device tree data, we need to properly detect EDMA and set the flags for SYSC_QUIRK_SWSUP_SIDLE | SYSC_QUIRK_SWSUP_MSTANDBY for tptc. We have these flags currently set for am4 and dra7, but not for am335x. Let's set them for all the SoCs as the tptc module should behave the same for all of them. It's likely that am335x was never tested to idle EDMA tptc. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-03-03bus: ti-sysc: Fix wrong offset for display subsystem reset quirkTony Lindgren1-4/+4
Commit 7324a7a0d5e2 ("bus: ti-sysc: Implement display subsystem reset quirk") added support for DSS reset, but is using dispc offset also for DSS also registers as reported by Tomi Valkeinen <tomi.valkeinen@ti.com>. Also, we're not using dispc_offset for dispc IRQSTATUS register so let's fix that too. Fixes: 7324a7a0d5e2 ("bus: ti-sysc: Implement display subsystem reset quirk") Reported-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Reviewed-by: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26bus: ti-sysc: Implement display subsystem reset quirkTony Lindgren1-3/+128
The display subsystem (DSS) needs the child outputs disabled for reset. In order to prepare to probe DSS without legacy platform data, let's implement sysc_pre_reset_quirk_dss() similar to what we have for the platform data with omap_dss_reset(). Note that we cannot directly use the old omap_dss_reset() without platform data callbacks and updating omap_dss_reset() to understand struct device. And we will be dropping omap_dss_reset() anyways when all the SoCs are probing with device tree, so let's not mess with the legacy code at all. Cc: Jyri Sarha <jsarha@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26bus: ti-sysc: Detect display subsystem related devicesTony Lindgren1-0/+19
In order to prepare probing display subsystem (DSS) with ti-sysc interconnect target module driver and device tree data, let's detect DSS related modules. We need to also add reset quirk handling for DSS, but until that's done, let's just enable the optional clock quirks for DSS and omap4 HDMI. The rest is just naming of modules if CONFIG_DEBUG is set. Cc: Jyri Sarha <jsarha@ti.com> Cc: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26bus: ti-sysc: Handle module unlock quirk needed for some RTCTony Lindgren1-6/+68
The RTC modules on am3 and am4 need quirk handling to unlock and lock them for reset so let's add the quirk handling based on what we already have for legacy platform data. In later patches we will simply drop the RTC related platform data and the old quirk handling. Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26bus: ti-sysc: Implement SoC revision handlingTony Lindgren1-1/+193
We need to know SoC type and features for cases where the same SoC may be installed in various versions on the same board and would need a separate dts file otherwise for the different variants. For example, am3703 is pin compatible with omap3630, but has sgx and iva accelerators disabled. We must not try to access the sgx or iva module registers on am3703, and need to set the unavailable devices disabled early. Let's also detect omap3430 as that is needed for display subsystem (DSS) reset later on, and GP vs EMU or HS devices. Further SoC specific disabled device detection can be added as needed, such as dra71x vs dra76x rtc and usb4. Cc: Adam Ford <aford173@gmail.com> Cc: André Hentschel <nerv@dawncrow.de> Cc: H. Nikolaus Schaller <hns@goldelico.com> Cc: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26bus: ti-sysc: Don't warn about legacy property for nested ti-sysc devicesTony Lindgren1-1/+1
In some cases we can have nested ti-sysc instances that may still use the legacy "ti,hwmods" property. Let's not warn if that's the case. Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26bus: ti-sysc: Consider non-existing registers too when matching quirksTony Lindgren1-63/+57
We are currently setting -1 for non-existing sysconfig related registers for quirks, but setting -ENODEV elsewhere. And for matching the quirks, we're now just ignoring the non-existing registers. This will cause issues with misdetecting DSS registers as the hardware revision numbers can have duplicates. To avoid this, let's standardize on using -ENODEV also for the quirks instead of -1. That way we can always just test for a match without adding any more complicated logic. Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26bus: ti-sysc: Improve reset to work with modules with no sysconfigTony Lindgren1-4/+6
At least display susbsystem (DSS) has modules with no sysconfig registers and rely on custom function for module reset handling. Let's make reset work with that too. Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26bus: ti-sysc: Rename clk related quirks to pre_reset and post_reset quirksTony Lindgren1-16/+16
The clk_disable_quirk and clk_enable_quirk should really be called pre_reset_quirk and post_reset_quirk to avoid confusion like we had with hdq1w reset. Let's also rename the related functions so the code is easier to follow. Note that we also have reset_done_quirk that is needed in some cases after checking the separate register for reset done bit. Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-26bus: ti-sysc: Fix 1-wire reset quirkTony Lindgren1-2/+2
Because of the i2c quirk we have the reset quirks named in a confusing way. Let's fix the 1-wire quirk accordinlyg. Then let's switch to using better naming later on. Fixes: 4e23be473e30 ("bus: ti-sysc: Add support for module specific reset quirks") Signed-off-by: Tony Lindgren <tony@atomide.com>
2020-02-09Merge tag 'armsoc-drivers' of ↵Linus Torvalds1-9/+9
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC-related driver updates from Olof Johansson: "Various driver updates for platforms: - Nvidia: Fuse support for Tegra194, continued memory controller pieces for Tegra30 - NXP/FSL: Refactorings of QuickEngine drivers to support ARM/ARM64/PPC - NXP/FSL: i.MX8MP SoC driver pieces - TI Keystone: ring accelerator driver - Qualcomm: SCM driver cleanup/refactoring + support for new SoCs. - Xilinx ZynqMP: feature checking interface for firmware. Mailbox communication for power management - Overall support patch set for cpuidle on more complex hierarchies (PSCI-based) and misc cleanups, refactorings of Marvell, TI, other platforms" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (166 commits) drivers: soc: xilinx: Use mailbox IPI callback dt-bindings: power: reset: xilinx: Add bindings for ipi mailbox drivers: soc: ti: knav_qmss_queue: Pass lockdep expression to RCU lists MAINTAINERS: Add brcmstb PCIe controller entry soc/tegra: fuse: Unmap registers once they are not needed anymore soc/tegra: fuse: Correct straps' address for older Tegra124 device trees soc/tegra: fuse: Warn if straps are not ready soc/tegra: fuse: Cache values of straps and Chip ID registers memory: tegra30-emc: Correct error message for timed out auto calibration memory: tegra30-emc: Firm up hardware programming sequence memory: tegra30-emc: Firm up suspend/resume sequence soc/tegra: regulators: Do nothing if voltage is unchanged memory: tegra: Correct reset value of xusb_hostr soc/tegra: fuse: Add APB DMA dependency for Tegra20 bus: tegra-aconnect: Remove PM_CLK dependency dt-bindings: mediatek: add MT6765 power dt-bindings soc: mediatek: cmdq: delete not used define memory: tegra: Add support for the Tegra194 memory controller memory: tegra: Only include support for enabled SoCs memory: tegra: Support DVFS on Tegra186 and later ...
2019-12-17bus: ti-sysc: Fix iterating over clocksTony Lindgren1-2/+8
Commit d878970f6ce1 ("bus: ti-sysc: Add separate functions for handling clocks") separated handling of optional clocks from the main clocks, but introduced an issue where we do not necessarily allocate a slot for both fck and ick clocks, but still assume fixed slots for enumerating over the clocks. Let's fix the issue by ensuring we always have slots for both fck and ick even if we don't use ick, and don't attempt to enumerate optional clocks if not allocated. In the long run we might want to simplify things a bit by only allocating space only for the optional clocks as we have only few devices with optional clocks. Fixes: d878970f6ce1 ("bus: ti-sysc: Add separate functions for handling clocks") Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-12bus: ti-sysc: Use PTR_ERR_OR_ZERO() to simplify codezhengbin1-3/+1
Fixes coccicheck warning: drivers/bus/ti-sysc.c:506:1-3: WARNING: PTR_ERR_OR_ZERO can be used Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-12bus: ti-sysc: Drop MMU quirksSuman Anna1-4/+0
The OMAP IOMMU driver no longer uses the pm_runtime_irq_safe() API after commit 1432ebbd6003 ("iommu/omap: remove pm_runtime_irq_safe flag for OMAP IOMMUs"), so the SYSC_QUIRK_LEGACY_IDLE quirk is no longer needed for MMU devices. Drop the same. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-12bus: ti-sysc: Implement quirk handling for CLKDM_NOAUTOTony Lindgren1-2/+8
For dra7 dcan and dwc3 instances we need to block clockdomain autoidle. Let's do this with CLKDM_NOAUTO quirk flag and enable it for dcan and dwc3. Cc: Keerthy <j-keerthy@ti.com> Cc: Roger Quadros <rogerq@ti.com> Cc: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-12bus: ti-sysc: Fix missing reset delay handlingTony Lindgren1-0/+4
We have dts property for "ti,sysc-delay-us", and we're using it, but the wait after OCP softreset only happens if devices are probed in legacy mode. Let's add a delay after writing the OCP softreset when specified. Fixes: e0db94fe87da ("bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits") Cc: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-12-10bus: ti-sysc: Fix missing force mstandby quirk handlingTony Lindgren1-1/+2
Commit 03856e928b0e ("bus: ti-sysc: Handle mstandby quirk and use it for musb") added quirk handling for mstandby quirk but did not consider that we also need a quirk variant for SYSC_QUIRK_FORCE_MSTANDBY. We need to use forced idle mode for both SYSC_QUIRK_SWSUP_MSTANDBY and SYSC_QUIRK_FORCE_MSTANDBY, but SYSC_QUIRK_SWSUP_MSTANDBY also need to additionally also configure no-idle mode when enabled. Fixes: 03856e928b0e ("bus: ti-sysc: Handle mstandby quirk and use it for musb") Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-11-14bus: ti-sysc: Adjust exception handling in sysc_child_add_named_clock()Markus Elfring1-4/+3
Add a jump target so that a call of the function “clk_put” can be better reused at the end of this function. Signed-off-by: Markus Elfring <elfring@users.sourceforge.net> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-11-14bus: ti-sysc: Add module enable quirk for audio AESSTony Lindgren1-1/+13
We must set the autogating bit on enable for AESS (Audio Engine SubSystem) when probed with ti-sysc interconnect target module driver. Otherwise it won't idle properly. Cc: Peter Ujfalusi <peter.ujfalusi@ti.com> Tested-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-22bus: ti-sysc: Use swsup quirks also for am335x musbTony Lindgren1-0/+2
Also on am335x we need the swsup quirks for musb. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-21bus: ti-sysc: Handle mstandby quirk and use it for musbTony Lindgren1-2/+8
We need swsup quirks for sidle and mstandby for musb to work properly. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-18Merge branch 'watchdog-fix' into omap-for-v5.5/ti-syscTony Lindgren1-4/+14
2019-10-18bus: ti-sysc: Fix watchdog quirk handlingTony Lindgren1-4/+14
I noticed that when probed with ti-sysc, watchdog can trigger on am3, am4 and dra7 causing a device reset. Turns out I made several mistakes implementing the watchdog quirk handling: 1. We must do both writes to spr register 2. We must also call the reset quirk on disable 3. On am3 and am4 we need to also set swsup quirk flag I probably only tested this earlier with watchdog service running when the watchdog never gets disabled. Fixes: 4e23be473e30 ("bus: ti-sysc: Add support for module specific reset quirks") Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-08bus: ti-sysc: avoid toggling power state of module during probeTero Kristo1-12/+18
Current implementation for ti-sysc powers down the module once module init is complete. However, right after power is disabled, it is enabled via runtime PM. This is unnecessary so avoid it by re-ordering the events a bit; move powering down of the module post runtime PM enable which makes sure the use counts are maintained properly and there is no extra power down/up sequence for the module. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-08bus: ti-sysc: drop the extra hardreset during initTero Kristo1-36/+1
There seems to be unnecessary extra hardreset line toggling applied during module init. This is unnecessary, as the reset lines are already asserted during boot, and it can cause certain modules to hang (iommus, remoteprocs.) Remove the extra hardreset toggle, and remove the now redundant function to handle this also. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-10-08bus: ti-sysc: re-order reset and main clock controlsTero Kristo1-4/+4
The main clocks and reset controls have a hardware level dependency, where one can't transition state without the other one transitioning. Because we don't have the dependency implemented in software, we must ensure the ordering of these two is done properly; they way this is handled is that clocks transition on software level without delay, and the status is only polled on reset side. Because of this, we must re-order the main clock and reset handling on the ti-sysc driver. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-30Merge tag 'armsoc-fixes' of ↵Linus Torvalds1-15/+37
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull ARM SoC fixes from Olof Johansson: "A few fixes that have trickled in through the merge window: - Video fixes for OMAP due to panel-dpi driver removal - Clock fixes for OMAP that broke no-idle quirks + nfsroot on DRA7 - Fixing arch version on ASpeed ast2500 - Two fixes for reset handling on ARM SCMI" * tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: ARM: aspeed: ast2500 is ARMv6K reset: reset-scmi: add missing handle initialisation firmware: arm_scmi: reset: fix reset_state assignment in scmi_domain_reset bus: ti-sysc: Remove unpaired sysc_clkdm_deny_idle() ARM: dts: logicpd-som-lv: Fix i2c2 and i2c3 Pin mux ARM: dts: am3517-evm: Fix missing video ARM: dts: logicpd-torpedo-baseboard: Fix missing video ARM: omap2plus_defconfig: Fix missing video bus: ti-sysc: Fix handling of invalid clocks bus: ti-sysc: Fix clock handling for no-idle quirks
2019-09-06bus: ti-sysc: Remove unpaired sysc_clkdm_deny_idle()Tony Lindgren1-1/+0
Commit d098913a10f8 ("bus: ti-sysc: Fix clock handling for no-idle quirks") fixed handling for no-idle quirk modules that are not enabled by the bootloader. But it also caused unpaired clockdomain calls that won't allow idling the system. That's because clkdm_allow_idle_nolock() and clkdm_deny_idle_nolock() have usage count with clkdm->forcewake_count. Let's drop the unpaired sysc_clkdm_deny_idle() to fix idling of devices. Fixes: d098913a10f8 ("bus: ti-sysc: Fix clock handling for no-idle quirks") Cc: Keerthy <j-keerthy@ti.com> Cc: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-05bus: ti-sysc: Fix handling of invalid clocksTony Lindgren1-4/+1
We can currently get "Unable to handle kernel paging request at virtual address" for invalid clocks with dts node but no driver: (__clk_get_hw) from [<c0138ebc>] (ti_sysc_find_one_clockdomain+0x18/0x34) (ti_sysc_find_one_clockdomain) from [<c0138f0c>] (ti_sysc_clkdm_init+0x34/0xdc) (ti_sysc_clkdm_init) from [<c0584660>] (sysc_probe+0xa50/0x10e8) (sysc_probe) from [<c065c6ac>] (platform_drv_probe+0x58/0xa8) Let's add IS_ERR checks to ti_sysc_clkdm_init() as And let's start treating clk_get() with -ENOENT as a proper error. If the clock name is specified in device tree we must succeed with clk_get() to continue. For modules with no clock names specified in device tree we will just ignore the clocks. Fixes: 2b2f7def058a ("bus: ti-sysc: Add support for missing clockdomain handling") Acked-by: Roger Quadros <rogerq@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-09-05bus: ti-sysc: Fix clock handling for no-idle quirksTony Lindgren1-11/+37
NFSroot can fail on dra7 when cpsw is probed using ti-sysc interconnect target module driver as reported by Keerthy. Device clocks and the interconnect target module may or may not be enabled by the bootloader on init, but we currently assume the clocks and module are on from the bootloader for "ti,no-idle" and "ti,no-idle-on-init" quirks as reported by Grygorii Strashko. Let's fix the issue by always enabling clocks init, and never disable them for "ti,no-idle" quirk. For "ti,no-idle-on-init" quirk, we must decrement the usage count later on to allow PM runtime to idle the module if requested. Fixes: 1a5cd7c23cc5 ("bus: ti-sysc: Enable all clocks directly during init to read revision") Cc: Keerthy <j-keerthy@ti.com> Cc: Vignesh Raghavendra <vigneshr@ti.com> Reported-by: Keerthy <j-keerthy@ti.com> Reported-by: Grygorii Strashko <grygorii.strashko@ti.com> Reviewed-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26bus: ti-sysc: Detect d2d when debug is enabledTony Lindgren1-0/+2
We want to see what modules probe when debug is enabled. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26bus: ti-sysc: Add module enable quirk for SGX on omap36xxTony Lindgren1-0/+21
Add module enable quirk for SGX needed on omap36xx. Cc: Adam Ford <aford173@gmail.com> Cc: Filip Matijević <filip.matijevic.pz@gmail.com> Cc: "H. Nikolaus Schaller" <hns@goldelico.com> Cc: Ivaylo Dimitrov <ivo.g.dimitrov.75@gmail.com> Cc: moaz korena <moaz@korena.xyz> Cc: Merlijn Wajer <merlijn@wizzup.org> Cc: Paweł Chmiel <pawel.mikolaj.chmiel@gmail.com> Cc: Philipp Rossak <embed3d@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-26bus: ti-sysc: Change return types of functionsNishka Dasgupta1-16/+6
Change return type of functions sysc_check_one_child() and sysc_check_children() from int to void as neither ever returns an error. Modify call sites of both functions accordingly. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: remove set but not used variable 'quirks'YueHaibing1-2/+1
Fixes gcc '-Wunused-but-set-variable' warning: drivers/bus/ti-sysc.c: In function sysc_reset: drivers/bus/ti-sysc.c:1452:50: warning: variable quirks set but not used [-Wunused-but-set-variable] It is never used since commit e0db94fe87da ("bus: ti-sysc: Make OCP reset work for sysstatus and sysconfig reset bits") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: YueHaibing <yuehaibing@huawei.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: allow reset sharing across devicesTero Kristo1-3/+9
Some devices need to share their reset signals, like DSP MMUs, thus drop the exclusive notation from reset request. Also, balance the init time reset count, otherwise the resets will never be applied post boot. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: rework the reset handlingTero Kristo1-20/+5
If reset controllers are assigned to the ti-sysc target-module, only ti-sysc is going to be able to control these. Thus, remove all the disable_on_idle flag usage, and assert/de-assert the reset always in the idle path. Otherwise the reset signal will always just be de-asserted. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: re-order the clkdm control around reset handlingTero Kristo1-4/+5
Parenting clockdomain for the IP should be enabled during the reset handling logic, otherwise the reset may not finish properly. Re-order the clockdomain control logic to avoid this. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: Add missing kerneldoc commentsSuman Anna1-0/+7
A few fields in various structures is missing the corresponding kerneldoc comments. Add them. Also, fixed the comment for sidlemodes. Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: Switch to SPDX license identifierSuman Anna1-9/+1
Use the appropriate SPDX license identifier in the TI sysc interconnect target driver source files and drop the previous boilerplate license text. Also, add the the SPDX license identifier in the associated ti-sysc header files. Signed-off-by: Suman Anna <s-anna@ti.com> Acked-by: Roger Quadros <rogerq@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-08-13bus: ti-sysc: Simplify cleanup upon failures in sysc_probe()Suman Anna1-7/+7
The clocks are not yet parsed and prepared until after a successful sysc_get_clocks(), so there is no need to unprepare the clocks upon any failure of any of the prior functions in sysc_probe(). The current code path would have been a no-op because of the clock validity checks within sysc_unprepare(), but let's just simplify the cleanup path by returning the error directly. While at this, also fix the cleanup path for a sysc_init_resets() failure which is executed after the clocks are prepared. Signed-off-by: Suman Anna <s-anna@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-07-24ARM: dts: Fix incorrect dcan register mapping for am3, am4 and dra7Tony Lindgren1-1/+2
We are currently using a wrong register for dcan revision. Although this is currently only used for detecting the dcan module, let's fix it to avoid confusion. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-07-24bus: ti-sysc: Fix using configured sysc mask valueTony Lindgren1-4/+1
We have cases where there are no softreset bits like with am335x lcdc. In that case ti,sysc-mask = <0> needs to be handled properly. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-07-24bus: ti-sysc: Fix handling of forced idleTony Lindgren1-1/+1
For some devices we can get the following warning on boot: ti-sysc 48485200.target-module: sysc_disable_module: invalid midlemode Fix this by treating SYSC_IDLE_FORCE like we do for the other bits for idlemodes mask. Fixes: d59b60564cbf ("bus: ti-sysc: Add generic enable/disable functions") Cc: Roger Quadros <rogerq@ti.com> Reviewed-by: Suman Anna <s-anna@ti.com> Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-06-10bus: ti-sysc: Add support for module specific reset quirksTony Lindgren1-5/+124
Some older interconnect target modules need module internal clock toggling quirks to reset properly. We've been doing this in the platform code earlier, but need to be able to it directly in the ti-sysc driver when we no longer rely on on the platform code. Let's add reset handling for 1-wire, i2c and watchdog. Later on we can add more modules like msdi and dss as they get tested. For dra7 pcie, we should be able to just use the rstctrl reset driver when available. Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Detect uarts also on omap34xxTony Lindgren1-1/+3
Looks like we currently only detect UART on omap36xx, let's also add support for omap34xx. And let's also fix the SWSUP mode, it should be SWSUP_SIDLE for omap3, not SWSUP_SIDLE_ACT like for omap4 and later. Note that we are still booting omap3 for most part without ti-sysc, so no need to treat this change as a fix. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
2019-05-28bus: ti-sysc: Do rstctrl reset handling in two phasesTony Lindgren1-8/+17
We need to deassert rstctrl resets before enabling clocks to avoid clock "failed to enable" errors. For asserting rstctrl reset, the clocks need to be enabled. As the reset controller status is not available for arrays, let's use devm_reset_control_get_optional() so we can get the status after reset. Note that depends on a proper PRM rstctrl driver, so far I've only tested this with earlier reset-simple patches. Tested-by: Keerthy <j-keerthy@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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