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The pointer clk is being initialized with a value that is never
read and it is being updated later with a new value. The
initialization is redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King <colin.king@canonical.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Based on 2 normalized pattern(s):
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation
this program is free software you can redistribute it and or modify
it under the terms of the gnu general public license version 2 as
published by the free software foundation #
extracted by the scancode license scanner the SPDX license identifier
GPL-2.0-only
has been chosen to replace the boilerplate/reference in 4122 file(s).
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Enrico Weigelt <info@metux.net>
Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>
Reviewed-by: Allison Randal <allison@lohutok.net>
Cc: linux-spdx@vger.kernel.org
Link: https://lkml.kernel.org/r/20190604081206.933168790@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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Now that we've gotten rid of clk_readl() we can remove io.h from the
clk-provider header and push out the io.h include to any code that isn't
already including the io.h header but using things like readl/writel,
etc.
Found with this grep:
git grep -l clk-provider.h | grep '.c$' | xargs git grep -L 'linux/io.h' | \
xargs git grep -l \
-e '\<__iowrite32_copy\>' --or \
-e '\<__ioread32_copy\>' --or \
-e '\<__iowrite64_copy\>' --or \
-e '\<ioremap_page_range\>' --or \
-e '\<ioremap_huge_init\>' --or \
-e '\<arch_ioremap_pud_supported\>' --or \
-e '\<arch_ioremap_pmd_supported\>' --or \
-e '\<devm_ioport_map\>' --or \
-e '\<devm_ioport_unmap\>' --or \
-e '\<IOMEM_ERR_PTR\>' --or \
-e '\<devm_ioremap\>' --or \
-e '\<devm_ioremap_nocache\>' --or \
-e '\<devm_ioremap_wc\>' --or \
-e '\<devm_iounmap\>' --or \
-e '\<devm_ioremap_release\>' --or \
-e '\<devm_memremap\>' --or \
-e '\<devm_memunmap\>' --or \
-e '\<__devm_memremap_pages\>' --or \
-e '\<pci_remap_cfgspace\>' --or \
-e '\<arch_has_dev_port\>' --or \
-e '\<arch_phys_wc_add\>' --or \
-e '\<arch_phys_wc_del\>' --or \
-e '\<memremap\>' --or \
-e '\<memunmap\>' --or \
-e '\<arch_io_reserve_memtype_wc\>' --or \
-e '\<arch_io_free_memtype_wc\>' --or \
-e '\<__io_aw\>' --or \
-e '\<__io_pbw\>' --or \
-e '\<__io_paw\>' --or \
-e '\<__io_pbr\>' --or \
-e '\<__io_par\>' --or \
-e '\<__raw_readb\>' --or \
-e '\<__raw_readw\>' --or \
-e '\<__raw_readl\>' --or \
-e '\<__raw_readq\>' --or \
-e '\<__raw_writeb\>' --or \
-e '\<__raw_writew\>' --or \
-e '\<__raw_writel\>' --or \
-e '\<__raw_writeq\>' --or \
-e '\<readb\>' --or \
-e '\<readw\>' --or \
-e '\<readl\>' --or \
-e '\<readq\>' --or \
-e '\<writeb\>' --or \
-e '\<writew\>' --or \
-e '\<writel\>' --or \
-e '\<writeq\>' --or \
-e '\<readb_relaxed\>' --or \
-e '\<readw_relaxed\>' --or \
-e '\<readl_relaxed\>' --or \
-e '\<readq_relaxed\>' --or \
-e '\<writeb_relaxed\>' --or \
-e '\<writew_relaxed\>' --or \
-e '\<writel_relaxed\>' --or \
-e '\<writeq_relaxed\>' --or \
-e '\<readsb\>' --or \
-e '\<readsw\>' --or \
-e '\<readsl\>' --or \
-e '\<readsq\>' --or \
-e '\<writesb\>' --or \
-e '\<writesw\>' --or \
-e '\<writesl\>' --or \
-e '\<writesq\>' --or \
-e '\<inb\>' --or \
-e '\<inw\>' --or \
-e '\<inl\>' --or \
-e '\<outb\>' --or \
-e '\<outw\>' --or \
-e '\<outl\>' --or \
-e '\<inb_p\>' --or \
-e '\<inw_p\>' --or \
-e '\<inl_p\>' --or \
-e '\<outb_p\>' --or \
-e '\<outw_p\>' --or \
-e '\<outl_p\>' --or \
-e '\<insb\>' --or \
-e '\<insw\>' --or \
-e '\<insl\>' --or \
-e '\<outsb\>' --or \
-e '\<outsw\>' --or \
-e '\<outsl\>' --or \
-e '\<insb_p\>' --or \
-e '\<insw_p\>' --or \
-e '\<insl_p\>' --or \
-e '\<outsb_p\>' --or \
-e '\<outsw_p\>' --or \
-e '\<outsl_p\>' --or \
-e '\<ioread8\>' --or \
-e '\<ioread16\>' --or \
-e '\<ioread32\>' --or \
-e '\<ioread64\>' --or \
-e '\<iowrite8\>' --or \
-e '\<iowrite16\>' --or \
-e '\<iowrite32\>' --or \
-e '\<iowrite64\>' --or \
-e '\<ioread16be\>' --or \
-e '\<ioread32be\>' --or \
-e '\<ioread64be\>' --or \
-e '\<iowrite16be\>' --or \
-e '\<iowrite32be\>' --or \
-e '\<iowrite64be\>' --or \
-e '\<ioread8_rep\>' --or \
-e '\<ioread16_rep\>' --or \
-e '\<ioread32_rep\>' --or \
-e '\<ioread64_rep\>' --or \
-e '\<iowrite8_rep\>' --or \
-e '\<iowrite16_rep\>' --or \
-e '\<iowrite32_rep\>' --or \
-e '\<iowrite64_rep\>' --or \
-e '\<__io_virt\>' --or \
-e '\<pci_iounmap\>' --or \
-e '\<virt_to_phys\>' --or \
-e '\<phys_to_virt\>' --or \
-e '\<ioremap_uc\>' --or \
-e '\<ioremap\>' --or \
-e '\<__ioremap\>' --or \
-e '\<iounmap\>' --or \
-e '\<ioremap\>' --or \
-e '\<ioremap_nocache\>' --or \
-e '\<ioremap_uc\>' --or \
-e '\<ioremap_wc\>' --or \
-e '\<ioremap_wc\>' --or \
-e '\<ioremap_wt\>' --or \
-e '\<ioport_map\>' --or \
-e '\<ioport_unmap\>' --or \
-e '\<ioport_map\>' --or \
-e '\<ioport_unmap\>' --or \
-e '\<xlate_dev_kmem_ptr\>' --or \
-e '\<xlate_dev_mem_ptr\>' --or \
-e '\<unxlate_dev_mem_ptr\>' --or \
-e '\<virt_to_bus\>' --or \
-e '\<bus_to_virt\>' --or \
-e '\<memset_io\>' --or \
-e '\<memcpy_fromio\>' --or \
-e '\<memcpy_toio\>'
I also reordered a couple includes when they weren't alphabetical and
removed clk.h from kona, replacing it with clk-provider.h because
that driver doesn't use clk consumer APIs.
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Chen-Yu Tsai <wens@csie.org>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Acked-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Sekhar Nori <nsekhar@ti.com>
Cc: Krzysztof Kozlowski <krzk@kernel.org>
Acked-by: Mark Brown <broonie@kernel.org>
Cc: Chris Zankel <chris@zankel.net>
Acked-by: Max Filippov <jcmvbkbc@gmail.com>
Acked-by: John Crispin <john@phrozen.org>
Acked-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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The SPI clock frequency of Designware IP for Hisilicon Hip08 is 250M.
The ACPI ID used is "HISI0173".
Signed-off-by: Jay Fang <f.fangjian@huawei.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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AMD SoC exposes clock for general purpose use. The clock registration
is done in clk-st driver. The MMIO mapping are passed on to the
clock driver for accessing the registers.
The misc clock handler will create MMIO mappings to access the
clock registers and enable the clock driver to expose the clock
for use of drivers which will connect to it.
Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Add the input frequency of 125MHz for the ThunderX2 I2C controller block.
The ACPI ID used is "CAV9007".
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
Signed-off-by: Kamlakant Patel <kamlakant.patel@cavium.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Acked-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
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ACPI HID for Hisilicon Hip07/08 should be HISI02A1/2,
not HISI0A21/2, HISI02A1/2 was tested ok but was modified
by the stupid typo when upstream the patches (by me),
correct them to the right IDs (matching the IDs in
drivers/i2c/busses/i2c-designware-platdrv.c).
Fixes: 6e14cf361a0c (ACPI / APD: Add clock frequency for Hisilicon Hip07/08 I2C controller)
Reported-by: Tao Tian <tiantao6@huawei.com>
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm
Pull more ACPI updates from Rafael Wysocki:
"These update the ACPICA code in the kernel to upstream revision
20170303 which adds a few minor fixes and improvements, update ACPI
SoC drivers with new device IDs, platform-related information and
similar, fix the register information in the xpower PMIC driver,
introduce a concept of "always present" devices to the ACPI device
enumeration code and use it to fix a problem with one platform, and
fix a system resume issue related to power resources.
Specifics:
- Update the ACPICA code in the kernel to upstream revision 20170303
which includes:
* Minor fixes and improvements in the core code (Bob Moore,
Seunghun Han).
* Debugger fixes (Colin Ian King, Lv Zheng).
* Compiler/disassembler improvements (Bob Moore, David Box, Lv
Zheng).
* Build-related update (Lv Zheng).
- Add new device IDs and platform-related information to the ACPI
drivers for Intel (LPSS) and AMD (APD) SoCs (Hanjun Guo, Hans de
Goede).
- Make it possible to quirk ACPI-enumerated devices as "always
present" on platforms where they are incorrectly reported as not
present by the AML and add the INT0002 device ID to the list of
"always present" devices (Hans de Goede).
- Fix the register information in the xpower PMIC driver and add
comments to map the registers to symbols used by AML to it (Hans de
Goede).
- Move the code turning off unused ACPI power resources during system
resume to a point after all devices have been resumed to avoid
issues with power resources that do not behave as expected (Hans de
Goede)"
* tag 'acpi-extra-4.12-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (22 commits)
ACPI / power: Delay turning off unused power resources after suspend
ACPI / PMIC: xpower: Fix power_table addresses
ACPI / LPSS: Call pwm_add_table() for Bay Trail PWM device
ACPICA: Update version to 20170303
ACPICA: iasl: add ASL conversion tool
ACPICA: Local cache support: Allow small cache objects
ACPICA: Disassembler: Do not unconditionally remove temporary names
ACPICA: iasl: Fix IORT SMMU GSI disassembling
ACPICA: Cleanup AML opcode definitions, no functional change
ACPICA: Debugger: Add interpreter blocking mark for single-step mode
ACPICA: debugger: fix memory leak on Pathname
ACPICA: Update for automatic repair code for objects returned by evaluate_object
ACPICA: Namespace: fix operand cache leak
ACPICA: Fix several incorrect invocations of ACPICA return macro
ACPICA: Fix a module for excessive debug output
ACPICA: Update some function headers, no funtional change
ACPICA: Disassembler: Enhance resource descriptor detection
i2c: designware: Add ACPI HID for Hisilicon Hip07/08 I2C controller
ACPI / APD: Add clock frequency for Hisilicon Hip07/08 I2C controller
ACPI / bus: Add INT0002 to list of always-present devices
...
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I2C clock frequency of Designware ip for Hisilicon Hip07 is 200M,
but 250M for Hip08, use two ACPI IDs to differentiate them.
Signed-off-by: Hanjun Guo <hanjun.guo@linaro.org>
Reviewed-by: Kefeng Wang <wangkefeng.wang@huawei.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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spi-next
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ARCH_VULCAN arm64 platform (for Broadcom Vulcan ARM64 processors) has
been discontinued. Cavium's ThunderX2 CN99XX (ARCH_THUNDER2) will be
the next revision of the platform.
Update compile dependencies and ACPI ID to reflect this change. There
is not need to retain ARCH_VULCAN since the Vulcan processor was never
in production and ARCH_VULCAN will be deleted soon.
Signed-off-by: Jayachandran C <jnair@caviumnetworks.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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'acpi-apei'
* acpi-soc:
ACPI / LPSS: enable hard LLP for DMA
ACPI / APD: Add clock frequency for future AMD I2C controller
* acpi-battery:
ACPI / battery: If _BIX fails, retry with _BIF
* acpi-video:
ACPI / video: Add force_native quirk for HP Pavilion dv6
ACPI / video: Add force_native quirk for Dell XPS 17 L702X
ACPI / video: Move ACPI_VIDEO_NOTIFY_* defines to acpi/video.h
* acpi-cppc:
ACPI / CPPC: set an error code on probe error path
* acpi-apei:
ACPI / APEI / ARM64: APEI initial support for ARM64
ACPI / APEI: Fix NMI notification handling
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* device-properties:
ACPI / platform: Add support for build-in properties
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We have a couple of drivers, acpi_apd.c and acpi_lpss.c,
that need to pass extra build-in properties to the devices
they create. Previously the drivers added those properties
to the struct device which is member of the struct
acpi_device, but that does not work. Those properties need
to be assigned to the struct device of the platform device
instead in order for them to become available to the
drivers.
To fix this, this patch changes acpi_create_platform_device
function to take struct property_entry pointer as parameter.
Fixes: 20a875e2e86e (serial: 8250_dw: Add quirk for APM X-Gene SoC)
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Tested-by: Yazen Ghannam <yazen.ghannam@amd.com>
Tested-by: Jérôme de Bretagne <jerome.debretagne@gmail.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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This patch supports 150 Mhz i2c clock frequency for Designware ip of future AMD I2C controller.
Reviewed-by: S-k, Shyam-sundar <Shyam-sundar.S-k@amd.com>
Signed-off-by: Shah, Nehal-bakulchandra <Nehal-bakulchandra.Shah@amd.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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For structure types defined in the same file or local header files, find
top-level static structure declarations that have the following
properties:
1. Never reassigned.
2. Address never taken
3. Not passed to a top-level macro call
4. No pointer or array-typed field passed to a function or stored in a
variable.
Declare structures having all of these properties as const.
Done using Coccinelle.
Based on a suggestion by Joe Perches <joe@perches.com>.
Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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The UART driver, dw8250.c, needs some details regarding the
Designware UART. For ACPI enumerated devices the values are
hard-coded, but since the driver also reads the values from
device properties, providing them with build-in properties.
This allows us to later remove the hard-coded values from
the driver.
Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Add device HID for SPI controller on Broadcom Vulcan ARM64.
The default frequency for SPI on Vulcan is 133MHz.
Signed-off-by: Kamlakant Patel <kamlakant.patel@broadcom.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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This flag is a no-op now (see commit 47b0eeb3dc8a "clk: Deprecate
CLK_IS_ROOT", 2016-02-02) so remove it.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Add device HID AMDI0020 to match the AMD ACPI Vendor ID (AMDI) as
registered in http://www.uefi.org/acpi_id_list, and the UART
controller on future AMD paltform will use the HID instead of AMD0020.
Signed-off-by: Wang Hongcheng <annie.wang@amd.com>
Acked-by: Ken Xue <Ken.Xue@amd.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Add device HID AMDI0010 to match the AMD ACPI Vendor ID (AMDI) that
was registered in http://www.uefi.org/acpi_id_list, and the I2C
controller on future AMD paltform will use the HID instead of AMD0010.
Signed-off-by: Xiangliang Yu <Xiangliang.Yu@amd.com>
Acked-by: Jarkko Nikula <jarkko.nikula@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Add APM X-Gene ACPI I2C device support by hooks into existent
ACPI APD driver. To fully enable support, require another
patch to add the X-Gene ACPI node into the DW I2C driver.
Signed-off-by: Loc Ho <lho@apm.com>
Reviewed-by: Ken Xue <Ken.Xue@amd.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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Clock provider drivers generally shouldn't include clk.h because
it's the consumer API. Remove the includes here because these are
a provider drivers.
Cc: Ken Xue <Ken.Xue@amd.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Cc: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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This new feature is to interpret AMD specific ACPI device to
platform device such as I2C, UART, GPIO found on AMD CZ and
later chipsets. It based on example intel LPSS. Now, it can
support AMD I2C, UART and GPIO.
Signed-off-by: Ken Xue <Ken.Xue@amd.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
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