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2025-05-15x86/cpuid: Set <asm/cpuid/api.h> as the main CPUID headerAhmed S. Darwish19-19/+19
The main CPUID header <asm/cpuid.h> was originally a storefront for the headers: <asm/cpuid/api.h> <asm/cpuid/leaf_0x2_api.h> Now that the latter CPUID(0x2) header has been merged into the former, there is no practical difference between <asm/cpuid.h> and <asm/cpuid/api.h>. Migrate all users to the <asm/cpuid/api.h> header, in preparation of the removal of <asm/cpuid.h>. Don't remove <asm/cpuid.h> just yet, in case some new code in -next started using it. Suggested-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Andrew Cooper <andrew.cooper3@citrix.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: John Ogness <john.ogness@linutronix.de> Cc: x86-cpuid@lists.linux.dev Link: https://lore.kernel.org/r/20250508150240.172915-3-darwi@linutronix.de
2025-05-15x86/cpuid: Move CPUID(0x2) APIs into <cpuid/api.h>Ahmed S. Darwish4-77/+75
Move all of the CPUID(0x2) APIs at <cpuid/leaf_0x2_api.h> into <cpuid/api.h>, in order centralize all CPUID APIs into the latter. While at it, separate the different CPUID leaf parsing APIs using header comments like "CPUID(0xN) parsing: ". Suggested-by: Ingo Molnar <mingo@kernel.org> Signed-off-by: Ahmed S. Darwish <darwi@linutronix.de> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Andrew Cooper <andrew.cooper3@citrix.com> Cc: John Ogness <john.ogness@linutronix.de> Cc: x86-cpuid@lists.linux.dev Link: https://lore.kernel.org/r/20250508150240.172915-2-darwi@linutronix.de
2025-05-15perf/x86/intel: Fix segfault with PEBS-via-PT with sample_freqAdrian Hunter1-4/+5
Currently, using PEBS-via-PT with a sample frequency instead of a sample period, causes a segfault. For example: BUG: kernel NULL pointer dereference, address: 0000000000000195 <NMI> ? __die_body.cold+0x19/0x27 ? page_fault_oops+0xca/0x290 ? exc_page_fault+0x7e/0x1b0 ? asm_exc_page_fault+0x26/0x30 ? intel_pmu_pebs_event_update_no_drain+0x40/0x60 ? intel_pmu_pebs_event_update_no_drain+0x32/0x60 intel_pmu_drain_pebs_icl+0x333/0x350 handle_pmi_common+0x272/0x3c0 intel_pmu_handle_irq+0x10a/0x2e0 perf_event_nmi_handler+0x2a/0x50 That happens because intel_pmu_pebs_event_update_no_drain() assumes all the pebs_enabled bits represent counter indexes, which is not always the case. In this particular case, bits 60 and 61 are set for PEBS-via-PT purposes. The behaviour of PEBS-via-PT with sample frequency is questionable because although a PMI is generated (PEBS_PMI_AFTER_EACH_RECORD), the period is not adjusted anyway. Putting that aside, fix intel_pmu_pebs_event_update_no_drain() by passing the mask of counter bits instead of 'size'. Note, prior to the Fixes commit, 'size' would be limited to the maximum counter index, so the issue was not hit. Fixes: 722e42e45c2f1 ("perf/x86: Support counter mask") Signed-off-by: Adrian Hunter <adrian.hunter@intel.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: Kan Liang <kan.liang@linux.intel.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Ingo Molnar <mingo@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Arnaldo Carvalho de Melo <acme@kernel.org> Cc: Jiri Olsa <jolsa@kernel.org> Cc: Namhyung Kim <namhyung@kernel.org> Cc: Ian Rogers <irogers@google.com> Cc: linux-perf-users@vger.kernel.org Link: https://lore.kernel.org/r/20250508134452.73960-1-adrian.hunter@intel.com
2025-05-15perf/aux: Allocate non-contiguous AUX pages by defaultYabin Cui1-0/+2
perf always allocates contiguous AUX pages based on aux_watermark. However, this contiguous allocation doesn't benefit all PMUs. For instance, ARM SPE and TRBE operate with virtual pages, and Coresight ETR allocates a separate buffer. For these PMUs, allocating contiguous AUX pages unnecessarily exacerbates memory fragmentation. This fragmentation can prevent their use on long-running devices. This patch modifies the perf driver to be memory-friendly by default, by allocating non-contiguous AUX pages. For PMUs requiring contiguous pages (Intel BTS and some Intel PT), the existing PERF_PMU_CAP_AUX_NO_SG capability can be used. For PMUs that don't require but can benefit from contiguous pages (some Intel PT), a new capability, PERF_PMU_CAP_AUX_PREFER_LARGE, is added to maintain their existing behavior. Signed-off-by: Yabin Cui <yabinc@google.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Reviewed-by: James Clark <james.clark@linaro.org> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Arnaldo Carvalho de Melo <acme@redhat.com> Cc: Jiri Olsa <jolsa@redhat.com> Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Namhyung Kim <namhyung@kernel.org> Link: https://lore.kernel.org/r/20250508232642.148767-1-yabinc@google.com
2025-05-15x86/msr: Add rdmsrl_on_cpu() compatibility wrapperIngo Molnar1-0/+1
Add a simple rdmsrl_on_cpu() compatibility wrapper for rdmsrq_on_cpu(), to make life in -next easier, where the PM tree recently grew more uses of the old API. Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Ingo Molnar <mingo@kernel.org> Acked-by: Mario Limonciello <mario.limonciello@amd.com> Cc: "H. Peter Anvin" <hpa@zytor.com> Cc: Juergen Gross <jgross@suse.com> Cc: Dave Hansen <dave.hansen@intel.com> Cc: Xin Li <xin@zytor.com> Link: https://lore.kernel.org/r/20250512145517.6e0666e3@canb.auug.org.au
2025-05-15x86/mm: Fix kernel-doc descriptions of various pgtable methodsShivank Garg1-19/+31
So 'make W=1' complains about a couple of kernel-doc descriptions in our MM primitives in pgtable.c: arch/x86/mm/pgtable.c:623: warning: Function parameter or struct member 'reserve' not described in 'reserve_top_address' arch/x86/mm/pgtable.c:672: warning: Function parameter or struct member 'p4d' not described in 'p4d_set_huge' arch/x86/mm/pgtable.c:672: warning: Function parameter or struct member 'addr' not described in 'p4d_set_huge' ... so on Fix them all up, add missing parameter documentation, and fix various spelling inconsistencies while at it. [ mingo: Harmonize kernel-doc annotations some more. ] Signed-off-by: Shivank Garg <shivankg@amd.com> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Dave Hansen <dave.hansen@linux.intel.com> Cc: Andrew Cooper <andrew.cooper3@citrix.com> Cc: Andy Lutomirski <luto@kernel.org> Cc: Brian Gerst <brgerst@gmail.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Juergen Gross <jgross@suse.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Rik van Riel <riel@surriel.com> Link: https://lore.kernel.org/r/20250514062637.3287779-1-shivankg@amd.com
2025-05-15arm64: dts: rockchip: Improve LED config for NanoPi R5SDiederik de Haas1-4/+14
The NanoPi R5S has 4 GPIO LEDs, a RED one for SYStem power and 3 green LEDs meant to indicate that a cable is connected to either of the 2.5GbE LAN ports or the 1GbE WAN port. In the NanoPi R5S schematic (2204; page 19) as well as on the PCB and on the case, SYS is used and not POWER. So replace 'power' with 'sys'. But keep the 'power_led' label/phandle even though the kernel doesn't use it, but it may be used outside of it. The SYStem LED already had "heartbeat" as its default-trigger. Set the default-trigger to "netdev" for the NICs so they will show when LAN1/LAN2/WAN is connected and set their default-state to "off". Also assign labels as close as possible to the labels on the case, while still being descriptive enough in their own right. Signed-off-by: Diederik de Haas <didi.debian@cknow.org> Link: https://lore.kernel.org/r/20250513170056.96259-1-didi.debian@cknow.org Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: add px30-pp1516 base dtsi and board variantsHeiko Stuebner4-0/+682
PP1516 are Touchscreen devices built around the PX30 SoC and companion devices to PX30-Cobra, again with multiple display options. The devices feature an EMMC, OTG port and a 720x1280 display with a touchscreen and camera Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250514150745.2437804-7-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: add px30-cobra base dtsi and board variantsHeiko Stuebner6-0/+760
Cobra are Touchscreen devices built around the PX30 SoC using a variety of display options. The devices feature an EMMC, network port, usb host + OTG ports and a 720x1280 display with a touchscreen. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250514150745.2437804-5-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: move reset to dedicated eth-phy node on ringneckHeiko Stuebner1-3/+19
Using snps,reset-* properties to handle the ethernet-phy resets is deprecated and instead a real phy node should be used. Move the Ringneck phy-reset properties to such a node Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Tested-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250514150745.2437804-3-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: add basic mdio node to px30Heiko Stuebner1-0/+6
Using snps,reset-* properties for handling the phy-reset is deprecated and instead a real phy node should be defined that then contains the reset-gpios handling. To facilitate this, add the core mdio node under the px30's gmac, similar to how the other Rockchip socs already do this. Signed-off-by: Heiko Stuebner <heiko.stuebner@cherry.de> Reviewed-by: Quentin Schulz <quentin.schulz@cherry.de> Link: https://lore.kernel.org/r/20250514150745.2437804-2-heiko@sntech.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 ↵Quentin Schulz1-8/+0
Puma with Haikou The u2phy0_host port is the part of the USB PHY0 (namely the HOST0_DP/DM lanes) which routes directly to the USB2.0 HOST controller[1]. The other lanes of the PHY are routed to the USB3.0 OTG controller (dwc3), which we do use. The HOST0_DP/DM lanes aren't routed on RK3399 Puma so let's simply disable the USB2.0 controllers. USB3 OTG has been known to be unstable on RK3399 Puma Haikou for a while, one of the recurring issues being that only USB2 is detected and not USB3 in host mode. Reading the justification above and seeing that we are keeping u2phy0_host in the Haikou carrierboard DTS probably may have bothered you since it should be changed to u2phy0_otg. The issue is that if it's switched to that, USB OTG on Haikou is entirely broken. I have checked the routing in the Gerber file, the lanes are going to the expected ball pins (that is, NOT HOST0_DP/DM). u2phy0_host is for sure the wrong part of the PHY to use, but it's the only one that works at the moment for that board so keep it until we figure out what exactly is broken. No intended functional change. [1] https://rockchip.fr/Rockchip%20RK3399%20TRM%20V1.3%20Part2.pdf Chapter 2 USB2.0 PHY Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-5-4a76a474a010@thaumatec.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: disable unrouted USB controllers and PHY on RK3399 PumaQuentin Schulz1-12/+0
The u2phy1_host port is the part of the USB PHY1 (namely the HOST1_DP/DM lanes) which routes directly to the USB2.0 HOST controller[1]. The other lanes of the PHY are routed to the USB3.0 OTG controller (dwc3), which we do use. The HOST1_DP/DM lanes aren't routed on RK3399 Puma so let's simply disable the USB2.0 controllers and associated part in USB2.0 PHY. No intended functional change. [1] https://rockchip.fr/Rockchip%20RK3399%20TRM%20V1.3%20Part2.pdf Chapter 2 USB2.0 PHY Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM") Signed-off-by: Quentin Schulz <quentin.schulz@cherry.de> Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-4-4a76a474a010@thaumatec.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15arm64: dts: rockchip: fix internal USB hub instability on RK3399 PumaLukasz Czechowski1-14/+26
Currently, the onboard Cypress CYUSB3304 USB hub is not defined in the device tree, and hub reset pin is provided as vcc5v0_host regulator to usb phy. This causes instability issues, as a result of improper reset duration. The fixed regulator device requests the GPIO during probe in its inactive state (except if regulator-boot-on property is set, in which case it is requested in the active state). Considering gpio is GPIO_ACTIVE_LOW for Puma, it means it’s driving it high. Then the regulator gets enabled (because regulator-always-on property), which drives it to its active state, meaning driving it low. The Cypress CYUSB3304 USB hub actually requires the reset to be asserted for at least 5 ms, which we cannot guarantee right now since there's no delay in the current config, meaning the hub may sometimes work or not. We could add delay as offered by fixed-regulator but let's rather fix this by using the proper way to model onboard USB hubs. Define hub_2_0 and hub_3_0 nodes, as the onboard Cypress hub consist of two 'logical' hubs, for USB2.0 and USB3.0. Use the 'reset-gpios' property of hub to assign reset pin instead of using regulator. Rename the vcc5v0_host regulator to cy3304_reset to be more meaningful. Pin is configured to output-high by default, which sets the hub in reset state during pin controller initialization. This allows to avoid double enumeration of devices in case the bootloader has setup the USB hub before the kernel. The vdd-supply and vdd2-supply properties in hub nodes are added to provide correct dt-bindings, although power supplies are always enabled based on HW design. Fixes: 2c66fc34e945 ("arm64: dts: rockchip: add RK3399-Q7 (Puma) SoM") Cc: stable@vger.kernel.org # 6.6 Cc: stable@vger.kernel.org # Backport of the patch in this series fixing product ID in onboard_dev_id_table in drivers/usb/misc/onboard_usb_dev.c driver Signed-off-by: Lukasz Czechowski <lukasz.czechowski@thaumatec.com> Link: https://lore.kernel.org/r/20250425-onboard_usb_dev-v2-3-4a76a474a010@thaumatec.com Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-05-15ARM: dts: rockchip: add rk3036 usb2phy nodes and enable them on kylinHeiko Stuebner2-0/+47
The rk3036 does contain a usb2phy, just until now it was just used implicitly without additional configuration. As we now have the bits in place for it getting actually controlled, add the necessary phy-node to the GRF simple-mfd. Enable the phy-ports in the same patch to not create bisectability issues, as hooking up the phys to the usb controllers would create probe deferrals until a board enables them. Doing everything in one patch, solves that issue. Only rk3036-kylin actually enabled the usb controllers, so is the only board affected. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250503201512.991277-4-heiko@sntech.de
2025-05-15arm64: dts: rockchip: move rk3528 i2c+uart aliases to board filesHeiko Stuebner2-16/+2
Even though they will be the same for all boards, i2c and uart aliases are supposed to live in the individual board files, to not create aliases for disabled nodes. So move the newly added aliases for rk3528 over to the Radxa E20C board, which is the only rk3528 board right now. Fixes: d3a05f490d04 ("arm64: dts: rockchip: Add I2C controllers for RK3528") Suggested-by: Arnd Bergmann <arnd@arndb.de> Reviewed-by: Yao Zi <ziyao@disroot.org> Signed-off-by: Heiko Stuebner <heiko@sntech.de> Link: https://lore.kernel.org/r/20250510220106.2108414-1-heiko@sntech.de
2025-05-15x86/asm-offsets: Export certain 'struct cpuinfo_x86' fields for 64-bit asm ↵Ard Biesheuvel2-9/+8
use too Expose certain 'struct cpuinfo_x86' fields via asm-offsets for x86_64 too, so that it will be possible to set CPU capabilities from 64-bit asm code. 32-bit already used these fields, so simply move those offset exports into the unified asm-offsets.c file. Signed-off-by: Ard Biesheuvel <ardb@kernel.org> Signed-off-by: Ingo Molnar <mingo@kernel.org> Cc: Brian Gerst <brgerst@gmail.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Link: https://lore.kernel.org/r/20250514104242.1275040-12-ardb+git@google.com
2025-05-15Merge tag 'kbuild-fixes-v6.15' of ↵Linus Torvalds1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild Pull Kbuild fixes from Masahiro Yamada: - Add proper pahole version dependency to CONFIG_GENDWARFKSYMS to avoid module loading errors - Fix UAPI header tests for the OpenRISC architecture - Add dependency on the libdw package in Debian and RPM packages - Disable -Wdefault-const-init-unsafe warnings on Clang - Make "make clean ARCH=um" also clean the arch/x86/ directory - Revert the use of -fmacro-prefix-map=, which causes issues with debugger usability * tag 'kbuild-fixes-v6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild: kbuild: fix typos "module.builtin" to "modules.builtin" Revert "kbuild, rust: use -fremap-path-prefix to make paths relative" Revert "kbuild: make all file references relative to source root" kbuild: fix dependency on sorttable init: remove unused CONFIG_CC_CAN_LINK_STATIC um: let 'make clean' properly clean underlying SUBARCH as well kbuild: Disable -Wdefault-const-init-unsafe kbuild: rpm-pkg: Add (elfutils-devel or libdw-devel) to BuildRequires kbuild: deb-pkg: Add libdw-dev:native to Build-Depends-Arch usr/include: openrisc: don't HDRTEST bpf_perf_event.h kbuild: Require pahole <v1.28 or >v1.29 with GENDWARFKSYMS on X86
2025-05-15powerpc/iommu: Use str_disabled_enabled() helperThorsten Blum1-2/+3
Remove hard-coded strings by using the str_disabled_enabled() helper. Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250210224246.363318-1-thorsten.blum@linux.dev
2025-05-15powerpc/powermac: Use str_enabled_disabled() and str_on_off() helpersThorsten Blum2-3/+4
Remove hard-coded strings by using the str_enabled_disabled() and str_on_off() helper functions. Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250117114625.64903-2-thorsten.blum@linux.dev
2025-05-15powerpc/mm/fault: Use str_write_read() helper functionThorsten Blum1-2/+3
Remove hard-coded strings by using the str_write_read() helper function. Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250210100648.1440-2-thorsten.blum@linux.dev
2025-05-15powerpc: Replace strcpy() with strscpy() in proc_ppc64_init()Thorsten Blum1-1/+2
strcpy() is deprecated; use strscpy() instead. Don't cast the destination buffer from 'u8[]' to 'char *' to satisfy the __must_be_array() requirement of strscpy(). No functional changes intended. Link: https://github.com/KSPP/linux/issues/88 Signed-off-by: Thorsten Blum <thorsten.blum@linux.dev> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250421183110.436265-1-thorsten.blum@linux.dev
2025-05-15powerpc/pseries/iommu: Fix kmemleak in TCE table userspace viewGaurav Batra1-1/+1
When a device is opened by a userspace driver, via VFIO interface, DMA window is created. This DMA window has TCE Table and a corresponding data for userview of TCE table. When the userspace driver closes the device, all the above infrastructure is free'ed and the device control given back to kernel. Both DMA window and TCE table is getting free'ed. But due to a code bug, userview of the TCE table is not getting free'ed. This is resulting in a memory leak. Befow is the information from KMEMLEAK unreferenced object 0xc008000022af0000 (size 16777216): comm "senlib_unit_tes", pid 9346, jiffies 4294983174 hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ backtrace (crc 0): kmemleak_vmalloc+0xc8/0x1a0 __vmalloc_node_range+0x284/0x340 vzalloc+0x58/0x70 spapr_tce_create_table+0x4b0/0x8d0 tce_iommu_create_table+0xcc/0x170 [vfio_iommu_spapr_tce] tce_iommu_create_window+0x144/0x2f0 [vfio_iommu_spapr_tce] tce_iommu_ioctl.part.0+0x59c/0xc90 [vfio_iommu_spapr_tce] vfio_fops_unl_ioctl+0x88/0x280 [vfio] sys_ioctl+0xf4/0x160 system_call_exception+0x164/0x310 system_call_vectored_common+0xe8/0x278 unreferenced object 0xc008000023b00000 (size 4194304): comm "senlib_unit_tes", pid 9351, jiffies 4294984116 hex dump (first 32 bytes): 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................ backtrace (crc 0): kmemleak_vmalloc+0xc8/0x1a0 __vmalloc_node_range+0x284/0x340 vzalloc+0x58/0x70 spapr_tce_create_table+0x4b0/0x8d0 tce_iommu_create_table+0xcc/0x170 [vfio_iommu_spapr_tce] tce_iommu_create_window+0x144/0x2f0 [vfio_iommu_spapr_tce] tce_iommu_create_default_window+0x88/0x120 [vfio_iommu_spapr_tce] tce_iommu_ioctl.part.0+0x57c/0xc90 [vfio_iommu_spapr_tce] vfio_fops_unl_ioctl+0x88/0x280 [vfio] sys_ioctl+0xf4/0x160 system_call_exception+0x164/0x310 system_call_vectored_common+0xe8/0x278 Fixes: f431a8cde7f1 ("powerpc/iommu: Reimplement the iommu_table_group_ops for pSeries") Signed-off-by: Gaurav Batra <gbatra@linux.ibm.com> Reviewed-by: Nilay Shroff <nilay@linux.ibm.com> Reviewed-by: Ritesh Harjani (IBM) <ritesh.list@gmail.com> Signed-off-by: Madhavan Srinivasan <maddy@linux.ibm.com> Link: https://patch.msgid.link/20250512224653.35697-1-gbatra@linux.ibm.com
2025-05-15s390/bpf: Remove the orig_call NULL checkIlya Leoshkevich1-3/+2
Now that orig_call can never be NULL, remove the respective check. Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Link: https://lore.kernel.org/r/20250512221911.61314-3-iii@linux.ibm.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2025-05-15s390/bpf: Store backchain even for leaf progsIlya Leoshkevich1-7/+5
Currently a crash in a leaf prog (caused by a bug) produces the following call trace: [<000003ff600ebf00>] bpf_prog_6df0139e1fbf2789_fentry+0x20/0x78 [<0000000000000000>] 0x0 This is because leaf progs do not store backchain. Fix by making all progs do it. This is what GCC and Clang-generated code does as well. Now the call trace looks like this: [<000003ff600eb0f2>] bpf_prog_6df0139e1fbf2789_fentry+0x2a/0x80 [<000003ff600ed096>] bpf_trampoline_201863462940+0x96/0xf4 [<000003ff600e3a40>] bpf_prog_05f379658fdd72f2_classifier_0+0x58/0xc0 [<000003ffe0aef070>] bpf_test_run+0x210/0x390 [<000003ffe0af0dc2>] bpf_prog_test_run_skb+0x25a/0x668 [<000003ffe038a90e>] __sys_bpf+0xa46/0xdb0 [<000003ffe038ad0c>] __s390x_sys_bpf+0x44/0x50 [<000003ffe0defea8>] __do_syscall+0x150/0x280 [<000003ffe0e01d5c>] system_call+0x74/0x98 Fixes: 054623105728 ("s390/bpf: Add s390x eBPF JIT compiler backend") Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Link: https://lore.kernel.org/r/20250512122717.54878-1-iii@linux.ibm.com Signed-off-by: Alexei Starovoitov <ast@kernel.org>
2025-05-14arm64: dts: qcom: x1e80100-hp-elitebook-ultra-g1q: DT for HP EliteBook Ultra G1qJuerg Haefliger2-0/+32
Introduce a device tree for the HP EliteBook Ultra G1q 14" AI laptop. It seems to be using the same baseboard as the HP OmniBook X 14 so just use that for now. Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com> Link: https://lore.kernel.org/r/20250429144957.2088284-4-juerg.haefliger@canonical.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14arm64: dts: qcom: x1e80100-hp-omnibook-x14: add sound labelJuerg Haefliger1-1/+1
Add a label to the sound node to make it easier to override from other nodes. Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com> Link: https://lore.kernel.org/r/20250429144957.2088284-2-juerg.haefliger@canonical.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14arm64: dts: qcom: sm8650: add the missing l2 cache nodePengyu Luo1-1/+8
Only two little a520s share the same L2, every a720 has their own L2 cache. Fixes: d2350377997f ("arm64: dts: qcom: add initial SM8650 dtsi") Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> Link: https://lore.kernel.org/r/20250405105529.309711-1-mitltlatltl@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14ARM: dts: qcom: apq8064: link LVDS clocksDmitry Baryshkov1-4/+12
Link LVDS clocks to the from MDP4 to the MMCC and back from the MMCC to the MDP4 display controller. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20250425-fd-mdp4-lvds-v4-7-6b212160b44c@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14arm64: dts: qcom: x1e001de-devkit: Enable support for both Type-A USB portsAbel Vesa1-0/+86
The Qualcomm X Elite Devkit has 2 USB-A ports, both connected to the USB multiport controller, each one via a separate NXP PTN3222 eUSB2-to-USB2 redriver to the eUSB2 PHY for High-Speed support, with a dedicated QMP PHY for SuperSpeed support. Describe each redriver and then enable each pair of PHYs and the USB controller itself, in order to enable support for the 2 USB-A ports. Signed-off-by: Abel Vesa <abel.vesa@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250324-x1e001de-devkit-dts-enable-usb-a-ports-v1-1-81153b2d1edf@linaro.org Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14arm64: dts: qcom: Add industrial mezzanine support for qcs6490-rb3gen2Nirmesh Kumar Singh2-0/+23
Add DTS support for Qualcomm qcs6490-rb3gen2 industrial mezzanine board. Signed-off-by: Sahil Chandna <quic_chandna@quicinc.com> Signed-off-by: Nirmesh Kumar Singh <quic_nkumarsi@quicinc.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250323123333.1622860-1-quic_nkumarsi@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14arm64: dts: qcom: x1e80100-hp-omnibook-x14: Enable SMB2360 0 and 1Juerg Haefliger1-2/+6
Commit d37e2646c8a5 ("arm64: dts: qcom: x1e80100-pmics: Enable all SMB2360 separately") disables all SMB2360s and let the board DTS explicitly enable them. The HP OmniBook DTS is from before this change and is missing the explicit enabling. Add that to get all USB root ports. Fixes: 6f18b8d4142c ("arm64: dts: qcom: x1e80100-hp-x14: dt for HP Omnibook X Laptop 14") Cc: stable@vger.kernel.org # 6.14 Signed-off-by: Juerg Haefliger <juerg.haefliger@canonical.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20250319160509.1812805-1-juerg.haefliger@canonical.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14ARM: dts: qcom-msm8960: add missing clocks to the timer nodeRudraksha Gupta1-0/+2
In order to fix DT schema warning and describe hardware properly, add missing sleep clock to the timer node. Solved by Dmitry Baryshkov on the APQ8064 SoC Link: https://lore.kernel.org/all/20250318-fix-nexus-4-v2-6-bcedd1406790@oss.qualcomm.com/ Signed-off-by: Rudraksha Gupta <guptarud@gmail.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250318-expressatt-solve-dts-errors-v1-1-14012a4bc315@gmail.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14arm64: dts: qcom: ipq5018: enable the download mode supportGeorge Moussalem1-0/+6
Enable support for download mode to collect RAM dumps in case of a system crash, allowing post mortem analysis. Signed-off-by: George Moussalem <george.moussalem@outlook.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250512-ipq5018-syscon-v1-2-eb1ad2414c3c@outlook.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14arm64: dts: qcom: msm8998-lenovo-miix-630: add Venus nodeDmitry Baryshkov1-0/+6
Enable Venus on Lenovo Miix 630 and specify corresponding firmware file. Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Jeffrey Hugo <jeffrey.l.hugo@gmail.com> Link: https://lore.kernel.org/r/20250425-miix-630-venus-v2-1-cdfca385a0c8@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14arm64: dts: qcom: ipq5018: Enable PCIeNitheesh Sekar1-0/+40
Enable the PCIe controller and PHY nodes for RDP 432-c2. Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com> Signed-off-by: Sricharan Ramabadhran <quic_srichara@quicinc.com> Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://lore.kernel.org/r/20250514-ipq5018-pcie-v10-2-5b42a8eff7ea@outlook.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14arm64: dts: qcom: ipq5018: Add PCIe related nodesNitheesh Sekar1-2/+238
Add phy and controller nodes for a 2-lane Gen2 and a 1-lane Gen2 PCIe bus. IPQ5018 has 8 MSI SPI interrupts and one global interrupt. NOTE: the PCIe controller supports gen3, yet the phy is limited to gen2. Signed-off-by: Nitheesh Sekar <quic_nsekar@quicinc.com> Signed-off-by: Sricharan R <quic_srichara@quicinc.com> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Signed-off-by: George Moussalem <george.moussalem@outlook.com> Link: https://lore.kernel.org/r/20250514-ipq5018-pcie-v10-1-5b42a8eff7ea@outlook.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14arm64: dts: qcom: sm8350: Fix typo in pil_camera_mem nodeAlok Tiwari1-1/+1
There is a typo in sm8350.dts where the node label mmeory@85200000 should be memory@85200000. This patch corrects the typo for clarity and consistency. Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC") Cc: stable@vger.kernel.org Signed-off-by: Alok Tiwari <alok.a.tiwari@oracle.com> Link: https://lore.kernel.org/r/20250514114656.2307828-1-alok.a.tiwari@oracle.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14arm64: dts: qcom: x1e80100-romulus: Enable DP over Type-CKonrad Dybcio1-0/+18
Both ports seem to work, just like on other X1E laptops. Tested with a Type-C-to-HDMI2.0 dock (translating into up to 2 DP lanes worth of bandwidth). Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com> Link: https://lore.kernel.org/r/20250514-topic-romu_dp-v1-1-6242d6acb5e5@oss.qualcomm.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-05-14Merge tag 'soc-fixes-6.15-2' of ↵Linus Torvalds24-62/+92
git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc Pull SoC fixes from Arnd Bergmann: "These all address issues in devicetree files: - The Rockchip rk3588j are now limited the same way as the vendor kernel, to allow room for the industrial-grade temperature ranges. - Seven more Rockchip fixes address minor issues with specific boards - Invalid clk controller references in multiple amlogic chips, plus one accidentally disabled audio on clock - Two devicetree fixes for i.MX8MP boards, both for incorrect regulator settings - A power domain change for apple laptop touchbar, fixing suspend/resume problems - An incorrect DMA controller setting for sophgo cv18xx chips" * tag 'soc-fixes-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: arm64: dts: amazon: Fix simple-bus node name schema warnings MAINTAINERS: delete email for Shiraz Hashim arm64: dts: imx8mp-var-som: Fix LDO5 shutdown causing SD card timeout arm64: dts: imx8mp: use 800MHz NoC OPP for nominal drive mode arm64: dts: amlogic: dreambox: fix missing clkc_audio node riscv: dts: sophgo: fix DMA data-width configuration for CV18xx arm64: dts: rockchip: fix Sige5 RTC interrupt pin arm64: dts: rockchip: Assign RT5616 MCLK rate on rk3588-friendlyelec-cm3588 arm64: dts: rockchip: Align wifi node name with bindings in CB2 arm64: dts: amlogic: g12: fix reference to unknown/untested PWM clock arm64: dts: amlogic: gx: fix reference to unknown/untested PWM clock ARM: dts: amlogic: meson8b: fix reference to unknown/untested PWM clock ARM: dts: amlogic: meson8: fix reference to unknown/untested PWM clock arm64: dts: apple: touchbar: Mark ps_dispdfr_be as always-on mailmap: Update email for Asahi Lina arm64: dts: rockchip: Fix mmc-pwrseq clock name on rock-pi-4 arm64: dts: rockchip: Use "regulator-fixed" for btreg on px30-engicam for vcc3v3-btreg arm64: dts: rockchip: Add pinmuxing for eMMC on QNAP TS433 arm64: dts: rockchip: Remove overdrive-mode OPPs from RK3588J SoC dtsi arm64: dts: rockchip: Allow Turing RK1 cooling fan to spin down
2025-05-14ARM: dts: davinci: da850-evm: Increase fifo thresholdAdam Ford1-1/+1
When operating at low speeds, the display may throw an underflow error and the display itself goes blank. Increasing the fifo-th value appears to correct this problem and the display can now operate when the system is operating at speeds as low as 100MHz. Signed-off-by: Adam Ford <aford173@gmail.com> Link: https://lore.kernel.org/r/20250504102959.81830-1-aford173@gmail.com Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org>
2025-05-14arm64: dts: renesas: r9a09g057: Add DMAC nodesFabrizio Castro1-0/+165
Add nodes for the DMAC IPs found on the Renesas RZ/V2H(P) SoC. Signed-off-by: Fabrizio Castro <fabrizio.castro.jz@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Reviewed-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com> Link: https://lore.kernel.org/r/20250423143422.3747702-7-fabrizio.castro.jz@renesas.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
2025-05-14LoongArch: uprobes: Remove redundant code about resume_eraTiezhu Yang2-7/+1
arch_uprobe_skip_sstep() returns true if instruction was emulated, that is to say, there is no need to single step for the emulated instructions. regs->csr_era will point to the destination address directly after the exception, so the resume_era related code is redundant, just remove them. Cc: stable@vger.kernel.org Fixes: 19bc6cb64092 ("LoongArch: Add uprobes support") Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-05-14LoongArch: uprobes: Remove user_{en,dis}able_single_step()Tiezhu Yang1-4/+0
When executing the "perf probe" and "perf stat" test cases about some cryptographic algorithm, the output shows that "Trace/breakpoint trap". This is because it uses the software singlestep breakpoint for uprobes on LoongArch, and no need to use the hardware singlestep. So just remove the related function call to user_{en,dis}able_single_step() for uprobes on LoongArch. How to reproduce: Please make sure CONFIG_UPROBE_EVENTS is set and openssl supports sm2 algorithm, then execute the following command. cd tools/perf && make ./perf probe -x /usr/lib64/libcrypto.so BN_mod_mul_montgomery ./perf stat -e probe_libcrypto:BN_mod_mul_montgomery openssl speed sm2 Cc: stable@vger.kernel.org Fixes: 19bc6cb64092 ("LoongArch: Add uprobes support") Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-05-14LoongArch: Save and restore CSR.CNTC for hibernationHuacai Chen2-1/+4
Save and restore CSR.CNTC for hibernation which is similar to suspend. For host this is unnecessary because sched clock is ensured continuous, but for kvm guest sched clock isn't enough because rdtime.d should also be continuous. Host::rdtime.d = Host::CSR.CNTC + counter Guest::rdtime.d = Host::CSR.CNTC + Host::CSR.GCNTC + Guest::CSR.CNTC + counter so, Guest::rdtime.d = Host::rdtime.d + Host::CSR.GCNTC + Guest::CSR.CNTC To ensure Guest::rdtime.d continuous, Host::rdtime.d should be at first continuous, while Host::CSR.GCNTC / Guest::CSR.CNTC is maintained by KVM. Cc: stable@vger.kernel.org Signed-off-by: Xianglai Li <lixianglai@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-05-14LoongArch: Move __arch_cpu_idle() to .cpuidle.text sectionHuacai Chen1-2/+5
Now arch_cpu_idle() is annotated with __cpuidle which means it is in the .cpuidle.text section, but __arch_cpu_idle() isn't. Thus, fix the missing .cpuidle.text section assignment for __arch_cpu_idle() in order to correct backtracing with nmi_backtrace(). The principle is similar to the commit 97c8580e85cf81c ("MIPS: Annotate cpu_wait implementations with __cpuidle") Cc: stable@vger.kernel.org Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-05-14LoongArch: Fix MAX_REG_OFFSET calculationHuacai Chen1-1/+1
Fix MAX_REG_OFFSET calculation, make it point to the last register in 'struct pt_regs' and not to the marker itself, which could allow regs_get_register() to return an invalid offset. Cc: stable@vger.kernel.org Fixes: 803b0fc5c3f2baa6e5 ("LoongArch: Add process management") Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-05-14LoongArch: Prevent cond_resched() occurring within kernel-fpuTianyang Zhang1-2/+20
When CONFIG_PREEMPT_COUNT is not configured (i.e. CONFIG_PREEMPT_NONE/ CONFIG_PREEMPT_VOLUNTARY), preempt_disable() / preempt_enable() merely acts as a barrier(). However, in these cases cond_resched() can still trigger a context switch and modify the CSR.EUEN, resulting in do_fpu() exception being activated within the kernel-fpu critical sections, as demonstrated in the following path: dcn32_calculate_wm_and_dlg() DC_FP_START() dcn32_calculate_wm_and_dlg_fpu() dcn32_find_dummy_latency_index_for_fw_based_mclk_switch() dcn32_internal_validate_bw() dcn32_enable_phantom_stream() dc_create_stream_for_sink() kzalloc(GFP_KERNEL) __kmem_cache_alloc_node() __cond_resched() DC_FP_END() This patch is similar to commit d02198550423a0b (x86/fpu: Improve crypto performance by making kernel-mode FPU reliably usable in softirqs). It uses local_bh_disable() instead of preempt_disable() for non-RT kernels so it can avoid the cond_resched() issue, and also extend the kernel-fpu application scenarios to the softirq context. Cc: stable@vger.kernel.org Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn> Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
2025-05-14arm64: dts: allwinner: a100: add Liontron H-A133L board supportAndre Przywara2-0/+212
The H-A133L board is an industrial development board made by Liontron. It contains a number of dedicated JST connectors, to connect external peripherals. It features: - Allwinner A133 SoC (4 * Arm Cortex-A53 cores at up to 1.6 GHz) - 1 GiB, 2 GiB or 4 GiB of LPDDR4 DRAM - between 16 and 128 GiB eMMC flash - AXP707 PMIC (compatible to AXP803) - 100 Mbit/s RJ45 Ethernet socket, using an JLSemi JL1101 PHY - XR829 WIFI+Bluetooth chip - 2 * USB 2.0 USB-A ports, plus three sets of USB pins on connectors (connected via a USB hub connected to USB1 on the SoC) - microSD card slot - 3.5mm A/V port - 12V power supply - connectors for an LVDS or MIPI-DSI panel Add the devicetree describing the board's peripherals and their connections. Despite being a devboard, the manufacturer does not publish a schematic (I asked), so the PMIC rail assignments were bases on BSP dumps, educated guesses and some experimentation. Dropping the always-on property from any of the rails carrying it will make the board hang as soon as the kernel turns off unused regulators. Signed-off-by: Andre Przywara <andre.przywara@arm.com> Link: https://patch.msgid.link/20250505164729.18175-4-andre.przywara@arm.com [wens@csie.org: fix property in &usbphy; fix comment typo in &usb_otg] Signed-off-by: Chen-Yu Tsai <wens@csie.org>
2025-05-14arm64: defconfig: Enable configs for MediaTek Genio EVK boardsNícolas F. R. A. Prado1-0/+9
Enable the missing configs to get all devices on the MediaTek Genio 1200, 700, 510 and 350 EVK boards probing, as indicated by the DT kselftest. This includes support for: Genio 1200/700/510/350: * MT6359/MT6357 PMICs Auxiliary ADC Genio 1200/700/510: * MDP3 (video scaling and color space conversion IP block) * ITE IT5205 Type-C USB Alternate Mode Passive MUX * Himax HX8279 controller based KD070FHFID078 DSI panel Genio 700/510: * Richtek RT1715 USB Type-C PD Controller Genio 1200: * MediaTek PCIe PHY * Mediatek MT6360 USB Type-C Port Controller Genio 350: * STARTEK KD070FHFID015 DSI panel * MediaTek UART DMA controller (APDMA) Signed-off-by: Nícolas F. R. A. Prado <nfraprado@collabora.com> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Link: https://lore.kernel.org/r/20250513-genio-defconfig-v1-1-c3862f91b6b2@collabora.com Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>