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2022-05-26V4L2: modify v4l2 base 7110 EVBchanghuang.liang3-171/+51
dts/starfive: add ov4689 configure and delete sc2235 pinctrl Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-23Merge branch 'CR_1004_gpio_add_reset_jianlong' into 'jh7110-5.15.y-devel'andy.hu1-3/+6
pinctrl: starfive: Add jh7110 aon controller gpio register See merge request sdk/linux!80
2022-05-23Merge branch 'CR_1035_CLOCK_TREE_VOUT_Xingyu.Wu' into 'jh7110-5.15.y-devel'andy.hu1-3/+9
clk:starfive:Add top clocks and reset in vout clock tree See merge request sdk/linux!78
2022-05-23pinctrl: starfive: Add jh7110 aon controller gpio registerJianlong Huang1-3/+6
1. Add jh7110 aon controller gpio and irq register 2. Modify jh7110 sys controller irq register 3. Add clock and reset about jh7110 iomux Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-05-23Merge branch 'CR_1028_SDIO_clivia.cai' into 'jh7110-5.15.y-devel'andy.hu2-11/+17
dt-bindings:sd: update jh7110 sd dt-bingings See merge request sdk/linux!79
2022-05-20dt-bindings:sd: update jh7110 sd dt-bingingsClivia.Cai2-11/+17
Update the evb board sd card dt-bingings Signed-off-by: Clivia.Cai <Clivia.Cai@starfivetech.com>
2022-05-20clk:starfive:Add top clocks and reset in vout clock treexingyu.wu1-3/+9
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
2022-05-20PCIe: plda: Add support for evbmason.huo3-6/+80
1.Add pinctrl for power-enable & perst#. 2.Config refclk & clkreq. 3.Add ATR for host bridge config space. Signed-off-by: mason.huo <mason.huo@starfivetech.com>
2022-05-19Merge branch 'CR_1005_SPI_1-6_Xingyu.Wu' into 'jh7110-5.15.y-devel'andy.hu3-10/+407
Cr 1005 spi 1 6 xingyu.wu See merge request sdk/linux!76
2022-05-19dts:starfive:Add nodes for SPI 1 to 6xingyu.wu3-10/+407
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-05-19Merge branch 'CR_1010_JPU_samin.guo' into 'jh7110-5.15.y-devel'andy.hu1-22/+12
Cr 1010 jpu samin.guo See merge request sdk/linux!75
2022-05-19Merge branch 'CR_971_temp_sensor_samin.guo' into 'jh7110-5.15.y-devel'andy.hu3-1/+47
Cr 971 temp sensor samin.guo See merge request sdk/linux!73
2022-05-19dt-bindings:jh7110: Adjust clock-names/reset-names newlinessamin1-20/+8
Adjust clock-names/reset-names newlines to unify the code style. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-05-19dt-bindings:jh7110:jpu: add NOC_BUS_CLK_VDEC for jpu.samin1-2/+4
JPU is in Power domain Vdec, so need NOC_BUS_CLK_VDEC. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-05-19dt-bingings:gmac:jh7110: add gmac1 support.yanhong.wang2-11/+16
remove pinctrl define, Modify the default configuration parameters. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com> Signed-off-by: samin <samin.guo@starfivetech.com>
2022-05-19riscv:defconfig: add SFCTEMP support.samin1-1/+1
SFCTEMP is a tempsensor for Starfive JH7100/7110 SOC. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-05-19dt-bindings: hwmon: add starfive,jh7110-temp bindingssamin2-0/+46
Add bindings for the temperature sensor on the StarFive JH7110 SoC. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-05-16riscv: dts: starfive: Add nodes for i2c2-5Hal Feng2-75/+173
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2022-05-15clksource:starfive-timer: Modify the default clock frequencysamin2-6/+1
timer on soc is 24M. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-05-15defconfig:starfive-jh7110: update defconfigyanhong.wang1-2/+1
Add YUTAI 8521 phy to defconfig. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-05-15dt-bingings:gmac:jh7110: change config parameteryanhong.wang1-7/+9
Change the gamc configuration parameter for JH7110. Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-05-15dt-bindings:starfive:jh7110: simplify aliasessamin1-6/+9
simplify aliases for serial/spi/gpio etc. Signed-off-by: samin <samin.guo@starfivetech.com> Signed-off-by: yanhong.wang <yanhong.wang@starfivetech.com>
2022-05-15driver:clk:Add noc clock initialization in isp clock tree driverxingyu.wu1-4/+8
Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-05-15dt-bingings:riscv_timer: timebase-frequency is 4M.samin2-2/+6
JH7110 SOC riscv_timer frequency is 4M. FPGA is 2M. Signed-off-by: samin <samin.guo@starfivetech.com>
2022-05-15modify dts to fix make failjianlong.huang1-2/+1
Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2022-05-15modify gpio index base evbjianlong.huang2-144/+212
Signed-off-by: jianlong.huang <jianlong.huang@starfivetech.com>
2022-05-07riscv: dts: starfive: Delete redundant nodes and improve coding styleHal Feng5-402/+224
Signed-off-by: Hal Feng <hal.feng@starfivetech.com>
2022-05-07Merge branch 'CR_937_DRM_keith.zhao' into 'jh7110_fpga_dev_5.15'andy.hu1-1/+1
DTS:drm:hdmi See merge request sdk/sft-riscvpi-linux-5.10!57
2022-05-07Merge branch 'CR_933_HIFI4_henry.qin' into 'jh7110_fpga_dev_5.15'andy.hu1-0/+4
HIFI4: Add xrp dts status in jh7110-common.dtsi See merge request sdk/sft-riscvpi-linux-5.10!56
2022-05-07DTS:drm:hdmikeith.zhao1-1/+1
fix hdmi node build error Signed-off-by: keith <keith.zhao@statfivetech.com>
2022-05-07HIFI4: Add xrp dts status in jh7110-common.dtsihenry.qin1-0/+4
Signed-off-by: henry.qin <henry.qin@starfivetech.com>
2022-05-07Merge branch 'CR_942_SPI_warning_Xingyu.Wu' into 'jh7110_fpga_dev_5.15'andy.hu2-4/+4
dts:starfive: Fix spi and qspi compilation warning See merge request sdk/sft-riscvpi-linux-5.10!50
2022-05-07dts:starfive: Fix spi and qspi compilation warningxingyu.wu2-4/+4
Signed-off-by: xingyu.wu <xingyu.wu@starfivetech.com>
2022-05-07Merge branch 'CR_939_PWMDAC_curry.zhang' into 'jh7110_fpga_dev_5.15'andy.hu1-1/+1
[Audio: PWMDAC] Adjust code style See merge request sdk/sft-riscvpi-linux-5.10!55
2022-05-07[Audio: PWMDAC] Adjust code stylecurry.zhang1-1/+1
Signed-off-by: curry.zhang <curry.zhang@starfivetech.com>
2022-05-06Merge branch 'CR_937_DRM_keith.zhao' into 'jh7110_fpga_dev_5.15'andy.hu2-3/+4
DTS:DRM See merge request sdk/sft-riscvpi-linux-5.10!53
2022-05-06Merge branch 'CR_930_V4L2_changhuang.liang' into 'jh7110_fpga_dev_5.15'andy.hu2-4/+10
V4L2: fixed code warning! See merge request sdk/sft-riscvpi-linux-5.10!52
2022-05-06Merge branch 'CR_907_GPU_shanlong.li' into 'jh7110_fpga_dev_5.15'andy.hu1-5/+6
driver:GPU: fix compile warnings See merge request sdk/sft-riscvpi-linux-5.10!48
2022-05-06Merge branch 'CR_940_PCIE_mason.huo' into 'jh7110_fpga_dev_5.15'andy.hu1-13/+14
PCI: plda: Fix kernel compile warnings See merge request sdk/sft-riscvpi-linux-5.10!49
2022-05-06driver:GPU: fix compile warningsshanlong.li1-5/+6
fix compile warnings Signed-off-by: shanlong.li <shanlong.li@starfivetech.com>
2022-05-06DTS:DRMkeith.zhao2-3/+4
fix build warning in drm dts node Signed-off-by: keith <keith.zhao@statfivetech.com>
2022-05-06V4L2: fixed code warning!changhuang.liang2-4/+10
V4L2: add m31 dphy reset support! dts/starfive: add m31 dphy reset configure! Signed-off-by: changhuang.liang <changhuang.liang@starfivetech.com>
2022-05-06PCI: plda: Fix kernel compile warningsmason.huo1-13/+14
Remove the unused functions. Adjust the dts configuration. Signed-off-by: mason.huo <mason.huo@starfivetech.com>
2022-05-06dt-bingings:crypto: add dma support for crypto.william.qiu1-6/+10
add dma support for crypto, so it can choose cpu/dma boot. Signed-off-by: william.qiu <william.qiu@starfivetech.com>
2022-05-05Merge branch 'CR_875_SPDIF_curry.zhang' into 'jh7110_fpga_dev_5.15'andy.hu1-2/+6
[Audio: SPDIF] Add standard system clock tree API See merge request sdk/sft-riscvpi-linux-5.10!42
2022-05-05Merge branch 'CR_738_PWMDAC_curry.zhang' into 'jh7110_fpga_dev_5.15'andy.hu3-24/+28
[Audio: PWMDAC] Add clock tree and modify driver for 7110 platform See merge request sdk/sft-riscvpi-linux-5.10!39
2022-05-05Merge branch 'CR_874_I2S_curry.zhang' into 'jh7110_fpga_dev_5.15'andy.hu3-10/+81
[Audio] I2S and WM8960 See merge request sdk/sft-riscvpi-linux-5.10!40
2022-05-05[Audio: PWMDAC] Add standard system clock tree apicurry.zhang3-24/+28
Signed-off-by: curry.zhang <curry.zhang@starfivetech.com>
2022-05-05Audio:tdm: Add clock/reset/pinctrl initializationWalkerChenL2-3/+67
Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
2022-05-05Merge branch 'CR_878_SBI_Xingyu.Wu' into 'jh7110_fpga_dev_5.15'andy.hu2-9/+17
spi: Add clock, reset and pinctrl See merge request sdk/sft-riscvpi-linux-5.10!41
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