summaryrefslogtreecommitdiff
path: root/arch
AgeCommit message (Expand)AuthorFilesLines
2023-08-17riscv: configs: disable CONFIG_DEBUG_ATOMIC_SLEEP in starfive_jh7110_defconfigziv.xu1-2/+1
2023-08-14riscv: config: hifi4: add sof default config for starfivecarter.li1-1/+7
2023-08-14riscv: dts: starfive: add sof dsp node for hifi4carter.li7-27/+177
2023-08-09riscv: dts: starfive: pwm backlight support for vf2shengyang.chen2-0/+52
2023-08-07CR 6852 Media:wave5: enable wave5 v4l2 decoder in vf2 defconfigSom Qin1-0/+2
2023-08-07Merge tag 'JH7110_515_SDK_v5.5.0' into vf2-515-develAndy Hu1-0/+2
2023-08-03Media:Wave5: Vpu driver in jh7110deconfig builded as module, not buildin.Som Qin1-1/+1
2023-08-03media: add wave511 v4l2 support for starfive platfromSom Qin1-1/+1
2023-08-03media: add wave5 v4l2 driver from mail listSom Qin1-0/+2
2023-08-03Merge branch 'CR_6864_SD_515_william.qiu' into 'vf2-515-devel'VF2_v3.4.5andy.hu1-0/+1
2023-08-03Merge tag 'JH7110_515_SDK_v5.4.4' into vf2-515-develAndy Hu1-0/+1
2023-08-02riscv: dts: starfive: change sd speed mode to highspeedWilliam Qiu1-0/+1
2023-08-02riscv: dts: starfive: add property to divide boardWilliam Qiu1-0/+1
2023-07-27Merge tag 'JH7110_515_SDK_v5.4.2' into vf2-515-develAndy Hu11-16/+21
2023-07-27Merge branch 'CR_6570_SDBOOT_william' into 'vf2-515-devel'andy.hu1-1/+5
2023-07-26riscv: dts: starfive: limit cclk in frequencyWilliam Qiu1-1/+5
2023-07-26riscv: dts: starfive: limit cclk in frequencyWilliam Qiu11-16/+21
2023-07-20Merge tag 'JH7110_515_SDK_v5.4.1' into vf2-515-develAndy Hu1-6/+7
2023-07-20Merge branch 'CR_6485_hifi_vf2_dts_515_carter.li' into 'vf2-515-devel'andy.hu1-4/+5
2023-07-19dts: e24: update e24 dts in vf2shanlong.li1-2/+2
2023-07-18dts:mailbox: update mailbox test dtsshanlong.li1-6/+7
2023-07-17CR_6485: dts:hifi4: change hifi4 firmware memory space in jh7110-visionfive-v...carter.li1-4/+5
2023-07-13Merge branch 'CR_5623_1GDDR_samin.guo' into 'vf2-515-devel'andy.hu1-1/+1
2023-07-13Merge tag 'JH7110_515_SDK_v5.4.0' into vf2-515-develAndy Hu2-13/+13
2023-07-12Merge branch 'CR_6485_hifi4_evb_dts_5.15_carter.li' into 'jh7110-5.15.y-devel'andy.hu2-6/+6
2023-07-12dts:hifi4: change hifi4 firmware memory spacecarter.li2-6/+6
2023-07-12Merge branch 'CR_6466_fix_dma_warning_smain.guo' into 'jh7110-5.15.y-devel'andy.hu1-1/+1
2023-07-12Merge branch 'CR_5623_1GDDR_samin.guo' into 'jh7110-5.15.y-devel'andy.hu1-1/+1
2023-07-10riscv: jh7110: Fix dwmac max-burst-lenSamin Guo1-1/+1
2023-07-07dts: starfive: jh7110: Adjust the CMA start addressSamin Guo1-1/+1
2023-07-06dts:e24: update e24 dts configshanlong.li2-5/+5
2023-06-28Merge tag 'JH7110_515_SDK_v5.3.0' into vf2-515-develAndy Hu4-1/+78
2023-06-28Merge branch 'CR_5620_DMA_NONCOHERENT_samin.guo' into 'jh7110-5.15.y-devel'andy.hu4-0/+77
2023-06-27riscv: dts: starfive:disable CANFD funcWilliam Qiu1-1/+1
2023-06-26riscv: starfive: jh7110: add dma-coherent for front-port-deviceSamin Guo1-0/+13
2023-06-26riscv: starfive: jh7110: select DMA_DIRECT_REMAPSamin Guo1-0/+1
2023-06-26soc: sifive: ccache: Add non-coherent DMA handlingEmil Renner Berthing3-0/+63
2023-06-20riscv: configs: Enable ov4689Changhuang Liang1-0/+1
2023-06-20riscv: dts: starfive: jh7110: Add ov4689 configureChanghuang Liang1-0/+27
2023-06-20dts: starfive: vf2: Adjust the CMA start addressSamin Guo1-1/+1
2023-06-10open hci usb driver for usb dongle bluetoothxiaoyong.zhu1-0/+1
2023-06-10Merge tag 'JH7110_515_SDK_v5.0.5' into vf2-515-devel-v3.0.xAndy Hu1-0/+19
2023-06-07dts: starfive: Add CPU 1.25GHz opp tableMason Huo1-0/+19
2023-05-24add usb serial configMichaelZhuxx1-0/+46
2023-05-24add CONFIG_CIFS config to support for Windows/Samba network file protocolsMichaelZhuxx1-0/+11
2023-05-19Merge tag 'JH7110_515_SDK_v5.0.0' into vf2-515-develAndy Hu1-6/+6
2023-05-19Merge branch 'CR_4877_vf2_515_DRM_inno_resolution_keith.zhao' into 'vf2-515-d...andy.hu1-1/+2
2023-05-19Merge tag 'JH7110_515_SDK_v4.9.1' into vf2-515-develAndy Hu2-0/+21
2023-05-18dts: starfive: update riscv,isa string to rv64imafdc_zba_zbbAndy Hu1-6/+6
2023-05-17Merge branch 'CR_5328_Cpu_Topology_515_joshua.yeong' into 'jh7110-5.15.y-devel'andy.hu1-0/+20
generated by cgit v1.2.3 (git 2.39.0) at 2025-02-26 12:31:06 +0300