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2021-08-05arm64: dts: mediatek: mt8173: Add domain supply for mfg_asyncBilal Wasim3-1/+9
da9211 regulator needs to be enabled before enabling the mfg_async power domain. Otherwise the subdomain is not enabled and causes failure in imgtec gpu driver boot. Add the "domain-supply" property to the "mfg_async" node in DT. Signed-off-by: Bilal Wasim <Bilal.Wasim@imgtec.com> Signed-off-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Link: https://lore.kernel.org/r/20210701114012.RESEND.3.I9e27871bb700c807a564957302b292e9935dae0b@changeid Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-05arm64: dts: mt8173: elm: Use aliases to mmc nodesHsin-Yi Wang1-0/+6
With commit 1796164fac7e ("dt-bindings: mmc: document alias support"), a way to specify fixed index numbers was provided. This patch use aliases to mmc nodes so the partition name for eMMC and SD card will be consistent across boots. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210728040710.2891955-2-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-05arm64: dts: mt8183: kukui: Use aliases to mmc nodesHsin-Yi Wang1-0/+2
With commit 1796164fac7e ("dt-bindings: mmc: document alias support"), a way to specify fixed index numbers was provided. This patch use aliases to mmc nodes so the partition name for eMMC and SD card will be consistent across boots. Signed-off-by: Hsin-Yi Wang <hsinyi@chromium.org> Tested-by: Enric Balletbo i Serra <enric.balletbo@collabora.com> Reviewed-by: Chen-Yu Tsai <wenst@chromium.org> Link: https://lore.kernel.org/r/20210728040710.2891955-1-hsinyi@chromium.org Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
2021-08-05arm64: dts: qcom: sdm845-oneplus: fix reserved-memCaleb Connolly1-2/+2
Fix the upper guard and the "removed_region", this fixes the random crashes which used to occur in memory intensive loads. I'm not sure WHY the upper guard being 0x2000 instead of 0x1000 doesn't fix this, but it HAS to be 0x1000. Fixes: e60fd5ac1f68 ("arm64: dts: qcom: sdm845-oneplus-common: guard rmtfs-mem") Signed-off-by: Caleb Connolly <caleb@connolly.tech> Link: https://lore.kernel.org/r/20210720153125.43389-2-caleb@connolly.tech Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: msm8994-angler: Disable cont_splash_memPetr Vorel1-0/+4
As the default definition breaks booting angler: [ 1.862561] printk: console [ttyMSM0] enabled [ 1.872260] msm_serial: driver initialized D - 15524 - pm_driver_init, Delta cont_splash_mem was introduced in 74d6d0a145835, but the problem manifested after commit '86588296acbf ("fdt: Properly handle "no-map" field in the memory region")'. Disabling it because Angler's firmware does not report where the memory is allocated (dmesg from downstream kernel): [ 0.000000] cma: Found cont_splash_mem@0, memory base 0x0000000000000000, size 16 MiB, limit 0x0000000000000000 [ 0.000000] cma: CMA: reserved 16 MiB at 0x0000000000000000 for cont_splash_mem Similar issue might be on Google Nexus 5X (lg-bullhead). Other MSM8992/4 are known to report correct address. Fixes: 74d6d0a145835 ("arm64: dts: qcom: msm8994/8994-kitakami: Fix up the memory map") Suggested-by: Konrad Dybcio <konradybcio@gmail.com> Signed-off-by: Petr Vorel <petr.vorel@gmail.com> Link: https://lore.kernel.org/r/20210622191019.23771-1-petr.vorel@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8250: assign DSI clock source parentsDmitry Baryshkov1-0/+6
Assign DSI clock source parents to DSI PHY clocks. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-6-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm845-mtp: assign DSI clock source parentsDmitry Baryshkov1-0/+3
Assign DSI clock source parents to DSI PHY clocks. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-5-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm845: assign DSI clock source parentsDmitry Baryshkov1-0/+6
Assign DSI clock source parents to DSI PHY clocks. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-4-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180: assign DSI clock source parentsDmitry Baryshkov1-0/+3
Assign DSI clock source parents to DSI PHY clocks. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Abhinav Kumar <abhinavk@codeaurora.org> Link: https://lore.kernel.org/r/20210709210729.953114-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280-idp: Add device tree files for IDP2Rajendra Nayak4-326/+367
Move all the common device tree bits for both sc7280 IDPs into a sc7280-idp.dtsi and create 2 different dts files (sc7280-idp.dts and sc7280-idp2.dts) in order to manage differences across the IDP SKU1 and SKU2 Boards. PMR735A is present on IDP board only and is not present on IDP2. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/1628082199-17002-3-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8350: fix IPA interconnectsAlex Elder1-5/+3
There should only be two interconnects defined for IPA on the QUalcomm SM8350 SoC. The names should also match those specified by the IPA Device Tree binding. Fixes: f11d3e7da32e ("arm64: dts: qcom: sm8350: add IPA information") Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210804210214.1891755-5-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180: define ipa_fw_mem nodeAlex Elder1-0/+5
Define the reserved memory space used for IPA firmware for the Qualcomm SC7180 SoC. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210804210214.1891755-4-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: enable IPA for sc7280-idpAlex Elder1-0/+5
Enable IPA for the SC7280 IDP, with the modem performing early initialization. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210804210214.1891755-3-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: add IPA informationAlex Elder1-0/+42
Add IPA-related nodes and definitions to "sc7280.dtsi", including the reserved memory area used for AP-based IPA firmware loading. Signed-off-by: Alex Elder <elder@linaro.org> Link: https://lore.kernel.org/r/20210804210214.1891755-2-elder@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180-trogdor: Move panel under the bridge chipDouglas Anderson1-15/+15
Putting the panel under the bridge chip (under the aux-bus node) allows the panel driver to get access to the DP AUX bus, enabling all sorts of fabulous new features. While we're at this, get rid of a level of hierarchy for the panel node. It doesn't need "ports / port" and can just have a "port" child. For Linux, this patch has a hard requirement on the patches adding DP AUX bus support to the ti-sn65dsi86 bridge chip driver. See the patch ("drm/bridge: ti-sn65dsi86: Add support for the DP AUX bus"). Signed-off-by: Douglas Anderson <dianders@chromium.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20210611101711.v10.11.Ibdb7735fb1844561b902252215a69526a14f9abd@changeid Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq8074: add PRNG nodeRobert Marko1-0/+8
PRNG insinde of IPQ8074 is already supported, so simply add the node for it. Signed-off-by: Robert Marko <robimarko@gmail.com> Link: https://lore.kernel.org/r/20210518181618.3238386-2-robimarko@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq8074: add crypto nodesRobert Marko1-0/+24
IPQ8074 uses Qualcom QCE crypto engine v5.1 which is already supported. So simply add nodes for its DMA and QCE itself. Signed-off-by: Robert Marko <robimarko@gmail.com> Link: https://lore.kernel.org/r/20210518181618.3238386-1-robimarko@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8350: add qupv3_id_1/i2c13 nodesJonathan Marek1-0/+38
Add the qupv3_id_1 node and the i2c13 child node used for i2c devices connected to gpio0/gpio1. Signed-off-by: Jonathan Marek <jonathan@marek.ca> Link: https://lore.kernel.org/r/20210513181309.12491-2-jonathan@marek.ca Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq6018: Add pcie supportSelvam Sathappan Periakaruppan1-0/+99
ipq6018 has 1 pcie gen3 port. This patch adds the support for the same. The GICv2m reg property value is a guess based on similar SoCs description in downstream Codeaurora kernel. It appears to work. Signed-off-by: Selvam Sathappan Periakaruppan <speriaka@codeaurora.org> [baruch: adjust #address-cells/#size-cells; drop unsupported property; increase parf registers size] Signed-off-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/0f733656666fa6adaa8e196419ebcfd04677d173.1620203062.git.baruch@tkos.co.il Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: pm8150b: Add DTS node for PMIC VBUS boosterWesley Cheng1-0/+6
Add the required DTS node for the USB VBUS output regulator, which is available on PM8150B. This will provide the VBUS source to connected peripherals. Cc: Rob Herring <robh@kernel.org> Signed-off-by: Wesley Cheng <wcheng@codeaurora.org> Signed-off-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> Link: https://lore.kernel.org/r/20210427130712.2005456-3-bryan.odonoghue@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8150: add SPI nodesFelipe Balbi1-0/+439
Add missing SPI nodes for SM8150. Signed-off-by: Felipe Balbi <felipe.balbi@microsoft.com> Reviewed-by: Caleb Connolly <caleb@connolly.tech> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210416103225.1872145-1-balbi@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: msm8916: Enable CoreSight STM componentGeorgi Djakov2-0/+28
Add DT binding for CoreSight System Trace Macrocell (STM) on msm8916, which can benefit the CoreSight development on DB410c. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Signed-off-by: Leo Yan <leo.yan@linaro.org> Acked-by: Stephan Gerhold <stephan@gerhold.net> Link: https://lore.kernel.org/r/20210321124212.4253-1-leo.yan@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: Add qfprom nodeRajendra Nayak1-0/+13
Add the qfprom node and its properties for the sc7280 SoC. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/1627627573-32454-5-git-send-email-rnayak@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: Fixup the cpufreq nodeSibi Sankar1-3/+3
Fixup the register regions used by the cpufreq node on SC7280 SoC to support per core L3 DCVS. Fixes: 7dbd121a2c58 ("arm64: dts: qcom: sc7280: Add cpufreq hw node") Signed-off-by: Sibi Sankar <sibis@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1627581885-32165-4-git-send-email-sibis@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq6018: correct TCSR block areaBaruch Siach1-3/+3
According to Bjorn Andersson[1], &tcsr_q6 base is 0x01937000 with size 0x21000. Adjust qcom,halt-regs offsets (add 0xe000) to match the new syscon base. Also, rename to just &tcsr as Kathiravan T suggested. [1] https://lore.kernel.org/r/YLgO0Aj1d4w9EcPv@yoga Signed-off-by: Baruch Siach <baruch@tkos.co.il> Link: https://lore.kernel.org/r/889aae1b88f120cb6281919d27164a959fbe69d0.1626948070.git.baruch@tkos.co.il Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180-trogdor: Add lpass dai link for HDMIV Sujith Kumar Reddy1-0/+17
Add dai link in sc7180-trogdor.dtsi for supporting audio over DP Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@qti.qualcomm.com> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210721080549.28822-3-srivasam@qti.qualcomm.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180: Update lpass cpu node for audio over dpV Sujith Kumar Reddy1-6/+10
Updaate lpass dts node with HDMI reg, interrupt and iommu for supporting audio over dp. Signed-off-by: V Sujith Kumar Reddy <vsujithk@codeaurora.org> Signed-off-by: Srinivasa Rao Mandadapu <srivasam@qti.qualcomm.com> Reviewed-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org> Link: https://lore.kernel.org/r/20210721080549.28822-2-srivasam@qti.qualcomm.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm845-oneplus: add ipa firmware namesCaleb Connolly1-0/+1
Add the correct patch to the ipa firmware now that custom paths are supported. Signed-off-by: Caleb Connolly <caleb@connolly.tech> Link: https://lore.kernel.org/r/20210720153125.43389-6-caleb@connolly.tech Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm845-oneplus-common: enable debug UARTCaleb Connolly1-0/+10
A labelled diagram showing the location of the Rx and Tx testpoints for the OnePlus 6 is available on the postmarketOS wiki: https://wiki.postmarketos.org/wiki/Serial_debugging:Cable_schematics The device uses 1.8v UART at a baud rate of 115200, bootloader output is also available here. Signed-off-by: Caleb Connolly <caleb@connolly.tech> Link: https://lore.kernel.org/r/20210720153125.43389-3-caleb@connolly.tech Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8350: Rename GENI serial engine DT nodeRobert Foss3-3/+3
In order to conform with downstream and upstream for previous generations of this hardware, rename dt-node 'qupv3_id_1' to 'qupv3_id_0'. Fixes: b7e8f433a673 ("arm64: dts: qcom: Add basic devicetree support for SM8350 SoC") Signed-off-by: Robert Foss <robert.foss@linaro.org> Link: https://lore.kernel.org/r/20210803125756.93824-1-robert.foss@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: Remove pm8350 and pmr735b for sc7280-idpsatya priya1-24/+10
Remove pm8350 and pmr735b die temp nodes as these pmics are not present on this board. Correct the tabbing for pmk8350_vadc node. Fixes: fbd5a1d22607 ("arm64: dts: qcom: sc7280: Add ADC channel nodes for PMIC temperatures to sc7280-idp") Signed-off-by: satya priya <skakit@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1627995852-24505-1-git-send-email-skakit@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7280: Add interconnect properties for USBSandeep Maheswaram1-0/+8
Add interconnect properties in USB DT nodes for sc7280. Signed-off-by: Sandeep Maheswaram <sanm@codeaurora.org> Reviewed-by: Matthias Kaehlcke <mka@chromium.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/1627880576-22391-1-git-send-email-sanm@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8250: remove bus clock from the mdss node for sm8250 targetDmitry Baryshkov1-2/+1
Remove the bus clock from the mdss device node, in order to facilitate bus band width scaling on sm8250 target. The parent device MDSS will not vote for bus bw, instead the vote will be triggered by mdp device node. Since a minimum vote is required to turn on bus clock, and since mdp device node already has the bus clock, remove the clock from the mdss device. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210803101657.1072358-3-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm845: move bus clock to mdp node for sdm845 targetDmitry Baryshkov1-4/+4
Move the bus clock to mdp device node,in order to facilitate bus band width scaling on sdm845 target. The parent device MDSS will not vote for bus bw, instead the vote will be triggered by mdp device node. Since a minimum vote is required to turn on bus clock, move the clock node to mdp device from where the votes are requested. Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Link: https://lore.kernel.org/r/20210803101657.1072358-2-dmitry.baryshkov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8350: Add wakeup-parent to tlmmBjorn Andersson1-0/+1
Now that TLMM has the wakeup table, specify the Power Domain Controller to be the wakeup-parent of TLMM. Reviewed-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210312034218.3324410-2-bjorn.andersson@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sc7180:: modified qfprom CORR size as per RAW sizeRavi Kumar Bokka1-1/+1
modified QFPROM controller CORRECTED region size as per RAW region size Signed-off-by: Ravi Kumar Bokka <rbokka@codeaurora.org> Reviewed-by: Douglas Anderson <dianders@chromium.org> Link: https://lore.kernel.org/r/1613582792-5225-1-git-send-email-rbokka@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm8250: Fix epss_l3 unit addressGeorgi Djakov1-1/+1
The unit address of the epss_l3 node is incorrect and does not match the address of its "reg" property. Let's fix it. Signed-off-by: Georgi Djakov <georgi.djakov@linaro.org> Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org> Reviewed-by: Sibi Sankar <sibis@codeaurora.org> Link: https://lore.kernel.org/r/20210211193637.9737-1-georgi.djakov@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: msm8996: Add gpu cooling supportYassine Oudjana1-2/+18
Add cooling-cells property and cooling maps for the GPU. Signed-off-by: Yassine Oudjana <y.oudjana@protonmail.com> Link: https://lore.kernel.org/r/Ku7mRZ_q2mYDZQ048IPlAc8VOVhH8N4uENhMI-JXxjeiZxjbRRs40ZJYwREb_ScgCvtQgtdl1VRjoDd7CR_8vCrbWVe8n3MwyB1S3VbSDis=@protonmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: pm8004: Enable the PMIC peripherals by defaultKonrad Dybcio1-2/+0
It makes no sense to require one more step to enable the PMIC features. If the PMIC is present, it already has to be explicitly #included anyway. Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210225213842.117694-1-konrad.dybcio@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05dt-bindings: arm: qcom: Drop qcom,mtpVinod Koul1-2/+1
qcom,mtp is used msm8916-mtp.dts but not documented, it is a generic mtp compatible and we have specfifc ones for each mtp so drop this arch/arm64/boot/dts/qcom/msm8916-mtp.dt.yaml: /: compatible: 'oneOf' conditional failed, one must be fixed: ['qcom,msm8916-mtp', 'qcom,msm8916-mtp/1', 'qcom,msm8916', 'qcom,mtp'] is too long Additional items are not allowed ('qcom,msm8916', 'qcom,mtp' were unexpected) Additional items are not allowed ('qcom,mtp' was unexpected) Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-8-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: msm8996: don't use underscore in node nameVinod Koul1-2/+2
We have underscore (_) in node name leading to warning: arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml: clocks: $nodename:0: 'clocks' does not match '^([a-z][a-z0-9\\-]+-bus|bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$' arch/arm64/boot/dts/qcom/apq8096-db820c.dt.yaml: clocks: xo_board: {'type': 'object'} is not allowed for {'compatible': ['fixed-clock'], '#clock-cells': [[0]], 'clock-frequency': [[19200000]], 'clock-output-names': ['xo_board'], 'phandle': [[115]]} Fix this by changing node name to use dash (-) Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-10-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: msm8994: don't use underscore in node nameVinod Koul1-2/+4
We have underscore (_) in node name leading to warning: arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dt.yaml: clocks: xo_board: {'type': 'object'} is not allowed for {'compatible': ['fixed-clock'], '#clock-cells': [[0]], 'clock-frequency': [[19200000]], 'phandle': [[26]]} arch/arm64/boot/dts/qcom/msm8994-msft-lumia-octagon-cityman.dt.yaml: clocks: sleep_clk: {'type': 'object'} is not allowed for {'compatible': ['fixed-clock'], '#clock-cells': [[0]], 'clock-frequency': [[32768]]} Fix this by changing node name to use dash (-) Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-9-vkoul@kernel.org [bjorn: Added clock-output-names to satisfy parent_names] Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm630: don't use underscore in node nameVinod Koul1-2/+2
We have underscore (_) in node name so fix that up as well. Fix this by changing node name to use dash (-) Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-11-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq6018: drop '0x' from unit addressVinod Koul1-1/+1
Nodes need not contain '0x' for the unit address. Drop it to fix the below warning: arch/arm64/boot/dts/qcom/ipq6018-cp01-c1.dt.yaml: reserved-memory: 'memory@0x60000' does not match any of the regexes Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-19-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm660: use reg value for memory nodeVinod Koul1-1/+1
memory node like other node should be node@reg, which is missing in this case, so fix it up arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: /: memory: False schema does not allow {'device_type': ['memory'], 'reg': [[0, 1073741824, 0, 536870912]]} Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-18-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: ipq8074: fix pci node reg propertyVinod Koul1-8/+8
reg property should be array of values, here it is a single array, leading to below warning: arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@10000000:reg:0: [268435456, 3869, 268439328, 168, 557056, 8192, 269484032, 4096] is too long arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@10000000:ranges: 'oneOf' conditional failed, one must be fixed: arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@10000000:ranges: 'oneOf' conditional failed, one must be fixed: [[2164260864, 0, 270532608, 270532608, 0, 1048576, 2181038080, 0, 271581184, 271581184, 0, 13631488]] is not of type 'null' [2164260864, 0, 270532608, 270532608, 0, 1048576, 2181038080, 0, 271581184, 271581184, 0, 13631488] is too long arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@20000000:reg:0: [536870912, 3869, 536874784, 168, 524288, 8192, 537919488, 4096] is too long arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@20000000:ranges: 'oneOf' conditional failed, one must be fixed: arch/arm64/boot/dts/qcom/ipq8074-hk01.dt.yaml: soc: pci@20000000:ranges: 'oneOf' conditional failed, one must be fixed: [[2164260864, 0, 538968064, 538968064, 0, 1048576, 2181038080, 0, 540016640, 540016640, 0, 13631488]] is not of type 'null' [2164260864, 0, 538968064, 538968064, 0, 1048576, 2181038080, 0, 540016640, 540016640, 0, 13631488] is too long Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-17-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sdm630: don't use empty memory nodeVinod Koul1-2/+2
We expect bootloader to full memory details but passing empty values can give warning, so add a default value Signed-off-by: Vinod Koul <vkoul@kernel.org> Tested-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210308060826.3074234-15-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: msm8998: don't use empty memory nodeVinod Koul1-2/+2
We expect bootloader to full memory details but passing empty values can give warning, so add a default value Signed-off-by: Vinod Koul <vkoul@kernel.org> Link: https://lore.kernel.org/r/20210308060826.3074234-14-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: msm8996: don't use empty memory nodeVinod Koul1-2/+2
We expect bootloader to full memory details but passing empty values can give warning, so add a default value Signed-off-by: Vinod Koul <vkoul@kernel.org> Tested-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210308060826.3074234-13-vkoul@kernel.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-05arm64: dts: qcom: sm6125: Add support for Sony Xperia 10IIMartin Botka2-0/+140
This commits add support for Sony Xperia 10II based on the SM6125 SoC. Currently working features: - dmesg output to bootloader preconfigured display - USB - eMMC - Volume down button Signed-off-by: Martin Botka <martin.botka@somainline.org> Link: https://lore.kernel.org/r/20210621195308.654587-2-martin.botka@somainline.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-25 14:05:01 +0300