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2023-01-05riscv: kernel: Expand functionlity of swsusp_arch_suspend for JH7110Sia Jee Heng3-3/+32
Futher expand the functionality of the swsusp_arch_suspend so that the hibernated image can be written to the disk and resume from the hibernated image. Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
2023-01-05riscv: kernel: Add support for hibernate/suspend to diskSia Jee Heng5-1/+165
The implementation assumes that exactly the same kernel is booted on the same hardware. We save the build number and date to the swap header so that we guarantee not to resume with a different kernel upon booted up the hibernated image. swsusp_arch_resume() and swsusp_arch_suspend() are coded as dummy functions for now and shall complete in the subsequent patches. Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com>
2023-01-05riscv: deconfig: Enable system suspend and pm testmason.huo1-1/+1
Config the system suspend feature, enable pm test feature. Signed-off-by: mason.huo <mason.huo@starfivetech.com>
2023-01-03vf2: config: add perf events configminda.chen1-0/+1
add perf events support in vf2. Signed-off-by: minda.chen <minda.chen@starfivetech.com>
2023-01-03dts: configs: add perf events configminda.chen1-0/+1
add 7110 perf support Signed-off-by: minda.chen <minda.chen@starfivetech.com>
2023-01-03RISC-V: Create unique identification for SoC PMUJoão Mário Domingos1-0/+3
The SBI PMU platform driver did not provide any identification for perf events matching. This patch introduces a new sysfs file inside the platform device (soc:pmu/id) for pmu identification. The identification is a 64-bit value generated as: [63-32]: mvendorid; [31]: marchid[MSB]; [30-16]: marchid[15-0]; [15-0]: mimpid[15MSBs]; The CSRs are detailed in the RISC-V privileged spec [1]. The marchid is split in MSB + 15LSBs, due to the MSB being used for open-source architecture identification. [1] https://github.com/riscv/riscv-isa-manual Signed-off-by: João Mário Domingos <joao.mario@tecnico.ulisboa.pt>
2023-01-03RISC-V: Add sscofpmf extension supportAtish Patra4-1/+11
The sscofpmf extension allows counter overflow and filtering for programmable counters. Enable the perf driver to handle the overflow interrupt. The overflow interrupt is a hart local interrupt. Thus, per cpu overflow interrupts are setup as a child under the root INTC irq domain. Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com>
2023-01-03RISC-V: Improve /proc/cpuinfo output for ISA extensionsAtish Patra2-2/+51
Currently, the /proc/cpuinfo outputs the entire riscv,isa string which is not ideal when we have multiple ISA extensions present in the ISA string. Some of them may not be enabled in kernel as well. Parse only the enabled ISA extension and print them in a separate row. Signed-off-by: Atish Patra <atishp@rivosinc.com>
2023-01-03RISC-V: Do no continue isa string parsing without correct XLENAtish Patra1-0/+5
The isa string should begin with either rv64 or rv32. Otherwise, it is an incorrect isa string. Currently, the string parsing continues even if it doesnot begin with current XLEN. Fix this by checking if it found "rv64" or "rv32" in the beginning. Signed-off-by: Atish Patra <atishp@rivosinc.com>
2023-01-03RISC-V: Implement multi-letter ISA extension probing frameworkAtish Patra2-6/+36
Multi-letter extensions can be probed using exising riscv_isa_extension_available API now. It doesn't support versioning right now as there is no use case for it. Individual extension specific implementation will be added during each extension support. Signed-off-by: Atish Patra <atishp@rivosinc.com>
2023-01-03RISC-V: Extract multi-letter extension names from "riscv, isa"Tsukasa OI1-8/+27
Currently, there is no usage for version numbers in extensions as any ratified non base ISA extension will always at v1.0. Extract the extension names in place for future parsing. Tested-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com> [Improved commit text and comments] Signed-off-by: Atish Patra <atishp@rivosinc.com>
2023-01-03RISC-V: Minimal parser for "riscv, isa" stringsTsukasa OI1-11/+56
Current hart ISA ("riscv,isa") parser don't correctly parse: 1. Multi-letter extensions 2. Version numbers All ISA extensions ratified recently has multi-letter extensions (except 'H'). The current "riscv,isa" parser that is easily confused by multi-letter extensions and "p" in version numbers can be a huge problem for adding new extensions through the device tree. Leaving it would create incompatible hacks and would make "riscv,isa" value unreliable. This commit implements minimal parser for "riscv,isa" strings. With this, we can safely ignore multi-letter extensions and version numbers. [Improved commit text and fixed a bug around 's' in base extension] Signed-off-by: Atish Patra <atishp@rivosinc.com> [Fixed workaround for QEMU] Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com> Tested-by: Heiko Stuebner <heiko@sntech.de>
2023-01-03RISC-V: Correctly print supported extensionsTsukasa OI1-3/+5
This commit replaces BITS_PER_LONG with number of alphabet letters. Current ISA pretty-printing code expects extension 'a' (bit 0) through 'z' (bit 25). Although bit 26 and higher is not currently used (thus never cause an issue in practice), it will be an annoying problem if we start to use those in the future. This commit disables printing high bits for now. Reviewed-by: Anup Patel <anup@brainfault.org> Tested-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Tsukasa OI <research_trasio@irq.a4lg.com> Signed-off-by: Atish Patra <atishp@rivosinc.com>
2023-01-03RISC-V: Add RISC-V SBI PMU extension definitionsAtish Patra1-0/+96
This patch adds all the definitions defined by the SBI PMU extension. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com>
2023-01-03RISC-V: Add CSR encodings for all HPMCOUNTERSAtish Patra1-0/+58
Linux kernel can directly read these counters as the HPMCOUNTERS CSRs are accessible in S-mode. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com>
2023-01-03RISC-V: Remove the current perf implementationAtish Patra4-571/+0
The current perf implementation in RISC-V is not very useful as it can not count any events other than cycle/instructions. Moreover, perf record can not be used or the events can not be started or stopped. Remove the implementation now for a better platform driver in future that will implement most of the missing functionality. Reviewed-by: Anup Patel <anup@brainfault.org> Signed-off-by: Atish Patra <atish.patra@wdc.com> Signed-off-by: Atish Patra <atishp@rivosinc.com>
2022-12-30riscv: defconfig: Enable touchscreenChanghuang Liang1-0/+2
Enable touchscreen TINKER FT5406 Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
2022-12-30riscv: dts: starfive: Add touchscreen node supportChanghuang Liang1-0/+5
Add touchscreen node support. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
2022-12-30Merge tag 'JH7110_515_SDK_v3.6.0' into vf2-515-develAndy Hu3-17/+6
version JH7110_515_SDK_v3.6.0 for JH7110 EVB board
2022-12-30configs:starfive:Enable usb wifi ECR6600UJianlong Huang1-0/+2
Enable usb wifi ECR6600U Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-12-29Merge branch 'CR_2861_ts_515_changhuang.liang' into 'jh7110-5.15.y-devel'andy.hu2-0/+6
CR_2861_ts_515_changhuang.liang input: touchscreen: Add tinker_ft5406 driver support See merge request sdk/linux!654
2022-12-23riscv: defconfig: Enable touchscreenChanghuang Liang1-0/+2
Enable touchscreen TINKER FT5406 Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
2022-12-22riscv: dts: starfive: Add tinker_ft5406 touchscreen nodeChanghuang Liang1-0/+4
Add tinker_ft5406 touchscreen node. Signed-off-by: Changhuang Liang <changhuang.liang@starfivetech.com>
2022-12-20riscv: dts: mmc: delete mmc1 configWilliam Qiu1-17/+0
delete mmc1 config, default use mmc0 Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2022-12-19Merge tag 'JH7110_515_SDK_v3.5.1' from sdk into vf2-515-develVF2_v2.5.0Andy Hu4-3/+26
version JH7110_515_SDK_v3.5.1 for JH7110 EVB board
2022-12-19Merge branch 'CR_2871_MMC_515_william.qiu' into 'jh7110-5.15.y-devel'andy.hu3-1/+25
CR_2871riscv: dts: mmc:modify mmc1 config See merge request sdk/linux!643
2022-12-15riscv: dts: mmc:modify mmc1 configWilliam Qiu3-1/+25
modify mmc1 config Signed-off-by: William Qiu <william.qiu@starfivetech.com>
2022-12-14CR_2865: hwrng: Reworked driver for speed performance and efficiencyJia Jie Ho2-2/+2
Changes: 1. Reseed during init only, not for every read. 2. Completion struct for irqreturn for better efficiency. 3. Add module_param for reseed operations based on request counter and/or timer countdown. 4. Removed unused macros and steps. Signed-off-by: Jia Jie Ho <jiajie.ho@starfivetech.com>
2022-12-09Merge remote-tracking branch 'sdk/jh7110-5.15.y-devel' into vf2-515-develAndy Hu9-32/+77
2022-12-09Merge branch 'CR_2822_PCIE_Kevin.xie' into 'jh7110-5.15.y-devel'andy.hu1-0/+1
CR 2822 riscv: configs: Add port bus driver for PCIe switch. See merge request sdk/linux!633
2022-12-09Merge branch 'CR_2796_515_sound_card_Xingyu.Wu' into 'jh7110-5.15.y-devel'andy.hu9-32/+70
CR_2796_515_sound_card_Xingyu.Wu See merge request sdk/linux!631
2022-12-08sound:starfive:Move playback and capture driver as slave to starfive I2SXingyu Wu1-2/+0
Move playback and capture driver as slave from snps I2S merge to starfive I2S. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-12-08riscv:jh7110.dtsi: add uboot and spl partition on qspi nodeziv.xu1-0/+6
add uboot and spl partition on qspi node Signed-off-by: ziv.xu <ziv.xu@starfive.com>
2022-12-07riscv: configs: Add port bus driver for PCIe switch.Kevin.xie1-0/+1
Verified on JH7110EVB with ASMedia EV Board (asm1806 version). Signed-off-by: Kevin.xie <kevin.xie@starfivetech.com>
2022-12-07riscv: dts: starfive: jh7110: Add multiple sound cardsXingyu Wu8-30/+70
Add multiple sound cards to let one device corresponds to one sound card. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-12-02configs:starfive:Enable QSPI for visionfive2Jianlong Huang1-0/+5
Enable QSPI for visionfive2 Signed-off-by: Jianlong Huang <jianlong.huang@starfivetech.com>
2022-12-02Merge tag 'JH7110_515_SDK_v3.3.0' into vf2-515-develJianlong Huang2-6/+30
version JH7110_515_SDK_v3.3.0 for JH7110 EVB board
2022-12-01Merge branch 'CR_2653_QSPI_5.15_ziv.xu' into 'jh7110-5.15.y-devel'andy.hu2-2/+26
CR 2653 QSPI 5.15 ziv.xu See merge request sdk/linux!612
2022-11-28riscv: dts: Change cpu vdd per stress testmason.huo1-4/+4
2022-11-19Merge tag 'JH7110_515_SDK_v3.1.0' into vf2-515-develJianlong Huang1-61/+30
version JH7110_515_SDK_v3.1.0 for JH7110 EVB board
2022-11-18driver:spi-cadence-quadspi: enable qspiziv.xu1-2/+21
enable qspi Signed-off-by: ziv.xu <ziv.xu@starfive.com>
2022-11-17Merge branch 'CR_2621_CPUIDLE_mason.huo' into 'jh7110-5.15.y-devel'andy.hu1-16/+0
CR_2621 riscv: dts: Remove unsupported cpuidle state See merge request sdk/linux!608
2022-11-15starfive:defconfig: modify defconfig to enable qspiziv.xu1-0/+5
modify defconfig to enable qspi Signed-off-by: ziv.xu <ziv.xu@starfive.com>
2022-11-14dma:dw:Add stg_axi clock and reset of noc_busXingyu Wu1-4/+6
Add 'JH7110_NOC_BUS_CLK_STG_AXI' clock and 'RSTN_U0_NOC_BUS_STG_AXI_N' reset. Signed-off-by: Xingyu Wu <xingyu.wu@starfivetech.com>
2022-11-14riscv:linux:drm : fix vout pm bugshengyang.chen1-6/+0
fix display problem of hdmi sys pm Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
2022-11-14linux:dts:starfive: remove some useless port of vout dtsshengyang.chen1-2/+0
fix double display bug remove some useless port of vout dts Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
2022-11-14linux:dts:starfive: Add pm support for vout dtsshengyang.chen1-40/+31
Add pm support for vout dts remove some useless port of vout dts Signed-off-by: shengyang.chen<shengyang.chen@starfivetech.com>
2022-11-11riscv: dts: Remove unsupported cpuidle statemason.huo1-16/+0
The cpuidle state1 is also implemented in sbi with WFI C state, but it cause audio play failed. Remove the cpuidle state1. Signed-off-by: mason.huo <mason.huo@starfivetech.com>
2022-11-09riscv:linux:vout:mipikeith.zhao1-2/+2
add 800*1280 I2C read to detect the status of connection Signed-off-by: keith <keith.zhao@starfivetech.com>
2022-11-03Revert "dts:starfive:Disable spi"Jianlong Huang1-1/+1
Have fixed spi issue which lead to crash booting. This reverts commit bb1b47228930974ab386badc2544a2dbd49ddc18.
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-12 00:38:56 +0300