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2021-08-18KVM: arm64: Drop check_kvm_target_cpu() based percpu probeAnshuman Khandual3-18/+4
kvm_target_cpu() never returns a negative error code, so check_kvm_target() would never have 'ret' filled with a negative error code. Hence the percpu probe via check_kvm_target_cpu() does not make sense as its never going to find an unsupported CPU, forcing kvm_arch_init() to exit early. Hence lets just drop this percpu probe (and also check_kvm_target_cpu()) altogether. While here, this also changes kvm_target_cpu() return type to a u32, making it explicit that an error code will not be returned from this function. Cc: Marc Zyngier <maz@kernel.org> Cc: James Morse <james.morse@arm.com> Cc: Alexandru Elisei <alexandru.elisei@arm.com> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: kvmarm@lists.cs.columbia.edu Cc: linux-kernel@vger.kernel.org Acked-by: Will Deacon <will@kernel.org> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1628744994-16623-5-git-send-email-anshuman.khandual@arm.com
2021-08-18KVM: arm64: Drop init_common_resources()Anshuman Khandual1-6/+1
Could do without this additional indirection via init_common_resources() by just calling kvm_set_ipa_limit() directly instead. Cc: Marc Zyngier <maz@kernel.org> Cc: James Morse <james.morse@arm.com> Cc: Alexandru Elisei <alexandru.elisei@arm.com> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: kvmarm@lists.cs.columbia.edu Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1628744994-16623-4-git-send-email-anshuman.khandual@arm.com
2021-08-18KVM: arm64: Use ARM64_MIN_PARANGE_BITS as the minimum supported IPAAnshuman Khandual1-1/+1
Drop hard coded value for the minimum supported IPA range bits (i.e 32). Instead use ARM64_MIN_PARANGE_BITS which improves the code readability. Cc: Marc Zyngier <maz@kernel.org> Cc: James Morse <james.morse@arm.com> Cc: Alexandru Elisei <alexandru.elisei@arm.com> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: kvmarm@lists.cs.columbia.edu Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1628744994-16623-3-git-send-email-anshuman.khandual@arm.com
2021-08-18arm64/mm: Add remaining ID_AA64MMFR0_PARANGE_ macrosAnshuman Khandual2-7/+14
Currently there are macros only for 48 and 52 bits parange value extracted from the ID_AA64MMFR0.PARANGE field. This change completes the enumeration and updates the helper id_aa64mmfr0_parange_to_phys_shift(). While here it also defines ARM64_MIN_PARANGE_BITS as the absolute minimum shift value PA range which could be supported on a given platform. Cc: Marc Zyngier <maz@kernel.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will@kernel.org> Cc: linux-arm-kernel@lists.infradead.org Cc: kvmarm@lists.cs.columbia.edu Cc: linux-kernel@vger.kernel.org Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/1628744994-16623-2-git-send-email-anshuman.khandual@arm.com
2021-08-18s390/pci: fix use after free of zpci_devNiklas Schnelle2-0/+11
The struct pci_dev uses reference counting but zPCI assumed erroneously that the last reference would always be the local reference after calling pci_stop_and_remove_bus_device(). This is usually the case but not how reference counting works and thus inherently fragile. In fact one case where this causes a NULL pointer dereference when on an SRIOV device the function 0 was hot unplugged before another function of the same multi-function device. In this case the second function's pdev->sriov->dev reference keeps the struct pci_dev of function 0 alive even after the unplug. This bug was previously hidden by the fact that we were leaking the struct pci_dev which in turn means that it always outlived the struct zpci_dev. This was fixed in commit 0b13525c20fe ("s390/pci: fix leak of PCI device structure") exposing the broken behavior. Fix this by accounting for the long living reference a struct pci_dev has to its underlying struct zpci_dev via the zbus->function[] array and only release that in pcibios_release_device() ensuring that the struct pci_dev is not left with a dangling reference. This is a minimal fix in the future it would probably better to use fine grained reference counting for struct zpci_dev. Fixes: 05bc1be6db4b2 ("s390/pci: create zPCI bus") Cc: stable@vger.kernel.org Reviewed-by: Matthew Rosato <mjrosato@linux.ibm.com> Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-08-18s390/sclp: reserve memory occupied by sclp early bufferAlexander Egorenkov2-0/+3
The memory block occupied by the SCLP early buffer that is allocated by the decompressor and then handed over to the decompressed kernel, must be reserved to prevent it from being reused for other purposes. This is necessary because the SCLP early buffer is still in use during kernel initialization. Fixes: f1d3c5323772 ("s390/boot: move sclp early buffer from fixed address in asm to C") Signed-off-by: Alexander Egorenkov <egorenar@linux.ibm.com> Reported-by: Alexander Gordeev <agordeev@linux.ibm.com> Reviewed-by: Alexander Gordeev <agordeev@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-08-18s390/mm: remove unused cmma functionsDavid Hildenbrand2-46/+0
The last user of arch_set_page_states(), arch_set_page_nodat() and arch_test_page_nodat() was removed in commit 394216275c7d ("s390: remove broken hibernate / power management support"), let's remove these functions. Signed-off-by: David Hildenbrand <david@redhat.com> Link: https://lore.kernel.org/r/20210806075430.6103-1-david@redhat.com Signed-off-by: Heiko Carstens <hca@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-08-18s390/qdio: remove unused support for SLIB parametersJulian Wiedmann1-4/+0
Neither of the two drivers provides any SLIB parameter data, so get rid of the dead code. Signed-off-by: Julian Wiedmann <jwi@linux.ibm.com> Reviewed-by: Benjamin Block <bblock@linux.ibm.com> Signed-off-by: Vasily Gorbik <gor@linux.ibm.com>
2021-08-18powerpc: Remove duplicate includesWan Jiabing2-3/+1
interrupt.c: asm/interrupt.h has been included at line 12, so remove the duplicate one at line 10. time.c: linux/sched/clock.h has been included at line 33,so remove the duplicate one at line 56 and move sched/cputime.h under sched including segament. Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Reviewed-by: Daniel Axtens <dja@axtens.net> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210323062916.295346-1-wanjiabing@vivo.com
2021-08-17arm64: dts: marvell: armada-37xx: Extend PCIe MEM spacePali Rohár2-2/+26
Current PCIe MEM space of size 16 MB is not enough for some combination of PCIe cards (e.g. NVMe disk together with ath11k wifi card). ARM Trusted Firmware for Armada 3700 platform already assigns 128 MB for PCIe window, so extend PCIe MEM space to the end of 128 MB PCIe window which allows to allocate more PCIe BARs for more PCIe cards. Without this change some combination of PCIe cards cannot be used and kernel show error messages in dmesg during initialization: pci 0000:00:00.0: BAR 8: no space for [mem size 0x01800000] pci 0000:00:00.0: BAR 8: failed to assign [mem size 0x01800000] pci 0000:00:00.0: BAR 6: assigned [mem 0xe8000000-0xe80007ff pref] pci 0000:01:00.0: BAR 8: no space for [mem size 0x01800000] pci 0000:01:00.0: BAR 8: failed to assign [mem size 0x01800000] pci 0000:02:03.0: BAR 8: no space for [mem size 0x01000000] pci 0000:02:03.0: BAR 8: failed to assign [mem size 0x01000000] pci 0000:02:07.0: BAR 8: no space for [mem size 0x00100000] pci 0000:02:07.0: BAR 8: failed to assign [mem size 0x00100000] pci 0000:03:00.0: BAR 0: no space for [mem size 0x01000000 64bit] pci 0000:03:00.0: BAR 0: failed to assign [mem size 0x01000000 64bit] Due to bugs in U-Boot port for Turris Mox, the second range in Turris Mox kernel DTS file for PCIe must start at 16 MB offset. Otherwise U-Boot crashes during loading of kernel DTB file. This bug is present only in U-Boot code for Turris Mox and therefore other Armada 3700 devices are not affected by this bug. Bug is fixed in U-Boot version 2021.07. To not break booting new kernels on existing versions of U-Boot on Turris Mox, use first 16 MB range for IO and second range with rest of PCIe window for MEM. Signed-off-by: Pali Rohár <pali@kernel.org> Fixes: 76f6386b25cc ("arm64: dts: marvell: Add Aardvark PCIe support for Armada 3700") Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
2021-08-17powerpc/configs: Regenerate mpc885_ads_defconfigJoel Stanley1-24/+22
Regenerate atop v5.14-rc6 by doing a make savedefconfig. The changes a re-ordering except for the following (which are still set indirectly): - CONFIG_DEBUG_KERNEL=y selected by EXPERT - CONFIG_PPC_EARLY_DEBUG_CPM_ADDR=0xff002008 which is the default setting Signed-off-by: Joel Stanley <joel@jms.id.au> Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210817045407.2445664-4-joel@jms.id.au
2021-08-17powerpc/config: Renable MTD_PHYSMAP_OFJoel Stanley1-0/+1
CONFIG_MTD_PHYSMAP_OF is not longer enabled as it depends on MTD_PHYSMAP which is not enabled. This is a regression from commit 642b1e8dbed7 ("mtd: maps: Merge physmap_of.c into physmap-core.c"), which added the extra dependency. Add CONFIG_MTD_PHYSMAP=y so this stays in the config, as Christophe said it is useful for build coverage. Fixes: 642b1e8dbed7 ("mtd: maps: Merge physmap_of.c into physmap-core.c") Signed-off-by: Joel Stanley <joel@jms.id.au> Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210817045407.2445664-3-joel@jms.id.au
2021-08-17powerpc/config: Fix IPV6 warning in mpc855_adsJoel Stanley1-2/+0
When building this config there's a warning: 79:warning: override: reassigning to symbol IPV6 Commit 9a1762a4a4ff ("powerpc/8xx: Update mpc885_ads_defconfig to improve CI") added CONFIG_IPV6=y, but left '# CONFIG_IPV6 is not set' in. IPV6 is default y, so remove both to clean up the build. Fixes: 9a1762a4a4ff ("powerpc/8xx: Update mpc885_ads_defconfig to improve CI") Signed-off-by: Joel Stanley <joel@jms.id.au> Acked-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210817045407.2445664-2-joel@jms.id.au
2021-08-17powerpc/head_check: Fix shellcheck errorsMichael Ellerman1-6/+6
Replace "cat file | grep pattern" with "grep pattern file", and quote a few variables. Together that fixes all shellcheck errors. Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210817125154.3369884-1-mpe@ellerman.id.au
2021-08-17Merge tag 'qcom-dts-for-5.15' of ↵Arnd Bergmann9-33/+290
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/dt Qualcomm dts updates for v5.15 This introduces the MSM8226 platform and an initial dts for the Samsung Galaxy S III Neo phone. MSM8974 gains another UART and this is used to enable Bluetooth on the Sony Xperia Z2 Tablet. Samsung Galaxy S5 gains regulator definitions for audio and modem remoteprocs, effectively enabling these. DSI clocks on APQ8064 are updates as the old legacy clock names are no longer supported by the driver. And IPQ806x GMAC nodes gains AHB resets wired up. Lastly APQ8060 is converted to a SPDX header and the ethernet node is updates in accordance with the binding. * tag 'qcom-dts-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: ARM: dts: qcom: add ahb reset to ipq806x-gmac ARM: dts: qcom: Fix up APQ8060 DragonBoard license ARM: dts: qcom: msm8974: castor: Add Bluetooth-related nodes ARM: dts: qcom: msm8974: Add blsp2_uart7 for bluetooth on sirius ARM: dts: qcom: Add initial DTS file for Samsung Galaxy S III Neo phone dt-bindings: arm: qcom: Document MSM8226 SoC binding ARM: dts: qcom: Add support for MSM8226 SoC ARM: dts: qcom: apq8060: Correct Ethernet node name and drop bogus irq property ARM: dts: qcom: apq8064: correct clock names ARM: dts: qcom: msm8974-klte: Enable remote processors Link: https://lore.kernel.org/r/20210816211957.579365-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-17ARM: dts: aspeed: p10bmc: Add power control pinsJim Wright2-2/+2
Add to p10bmc systems the GPIO line names used in chassis power on / off control and chassis power good monitoring. Names used are as documented at [1]. [1] https://github.com/openbmc/docs/blob/master/designs/device-tree-gpio-naming.md Signed-off-by: Jim Wright <jlwright@us.ibm.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Link: https://lore.kernel.org/r/20210816160002.18645-1-jlwright@us.ibm.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-08-17Merge tag 'v5.14-rc3' into arm64-for-5.15Bjorn Andersson82-249/+501
The USB maintainer felt the strong need to push '1f958f3dff42 ("Revert "arm64: dts: qcom: Harmonize DWC USB3 DT nodes name"")' through the usb tree, so merge v5.14-rc3 to resolve the resulting merge conflicts. Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-08-17Merge tag 'qcom-arm64-defconfig-for-5.15' of ↵Arnd Bergmann1-0/+1
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/defconfig Qualcomm ARM64 defconfig updates for v5.15 This enabled the MSM8996 CPU clock driver, enabling CPUfreq on the platform. * tag 'qcom-arm64-defconfig-for-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: defconfig: Enable Qualcomm MSM8996 CPU clock driver Link: https://lore.kernel.org/r/20210816210014.577699-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-17Merge tag 'imx-defconfig-5.15' of ↵Arnd Bergmann1-1/+2
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/defconfig i.MX defconfig update for 5.15: - Enable LTC3676 PMIC, SCSI_LOWLEVEL and KPROBES support in imx_v6_v7_defconfig. * tag 'imx-defconfig-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: ARM: imx_v6_v7_defconfig: enable driver of the LTC3676 PMIC ARM: imx_v6_v7_defconfig: Let CONFIG_SCSI_LOWLEVEL be selected ARM: imx_v6_v7_defconfig: Select CONFIG_KPROBES Link: https://lore.kernel.org/r/20210814133853.9981-4-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-17Merge tag 'tegra-for-5.15-arm-defconfig' of ↵Arnd Bergmann2-17/+12
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/defconfig ARM: tegra: Default configuration changes for v5.15-rc1 Enables a couple of drivers by default so that the configuration is useful on more devices. This also rebuilds the tegra_defconfig, which hasn't been done in a long time. * tag 'tegra-for-5.15-arm-defconfig' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: multi_v7_defconfig: Enable CONFIG_TEGRA30_TSENSOR ARM: multi_v7_defconfig: Enable Acer A500 drivers ARM: tegra: Rebuild default configuration ARM: tegra: Enable CONFIG_CROS_EC ARM: tegra: Enable Acer A500 drivers ARM: tegra: Enable CONFIG_FB ARM: tegra: Enable CONFIG_TEGRA30_TSENSOR Link: https://lore.kernel.org/r/20210813162157.2820913-5-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-17Merge tag 'qcom-arm64-fixes-for-5.14' of ↵Arnd Bergmann5-5/+21
git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into arm/fixes Qualcomm ARM64 fixes for v5.14 This fixes three regressions across Angler and Bullhead, introduced by advancements in the platform definition. It then corrects the powerdown GPIOs for the speaker amps on C630 and lastly fixes a typo that assigned CPU7 in SC7280 to the wrong CPUfreq domain. * tag 'qcom-arm64-fixes-for-5.14' of git://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: arm64: dts: qcom: sdm845-oneplus: fix reserved-mem arm64: dts: qcom: msm8994-angler: Disable cont_splash_mem arm64: dts: qcom: sc7280: Fixup cpufreq domain info for cpu7 arm64: dts: qcom: msm8992-bullhead: Fix cont_splash_mem mapping arm64: dts: qcom: msm8992-bullhead: Remove PSCI arm64: dts: qcom: c630: fix correct powerdown pin for WSA881x Link: https://lore.kernel.org/r/20210816205030.576348-1-bjorn.andersson@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-17Merge tag 'imx-dt-5.15' of ↵Arnd Bergmann27-441/+2431
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm32 device tree changes for 5.15: - A series from Christoph Niedermaier to clean up i.MX6 DHCOM support. - New board support: DHCOM based PicoITX, DHSOM based DRC02, SolidRun SolidSense, SKOV i.MX6 boards. - Add WiFi support for i.MX7D base reMkarkable2 device. - Add FTM devices for i.MX7 to have Flex Timers support. - Configure ENET_REF clock to 125MHz for imx6qp-prtwd3 to support RGMII PHY mode. - Drop unneeded #address-cells and #size-cells from vf610-zii SPI EEPROM device node. - Add missing USB OTG OC pinmux and Crypto device for i.MX6QDL Gateworks boards. * tag 'imx-dt-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (23 commits) ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHz ARM: dts: vf610-zii-dev-rev-b: Remove #address-cells and #size-cells property from at93c46d dt node ARM: dts: add SKOV imx6q and imx6dl based boards ARM: dts: imx7: add ftm nodes for Flex Timers ARM: dts: imx6qdl-dhcom: Add DHSOM based DRC02 board ARM: dts: imx6qdl-dhcom: Add DHCOM based PicoITX board ARM: dts: imx6qdl-dhcom: Split SoC-independent parts of DHCOM SOM and PDK2 ARM: dts: imx6q-dhcom: Cleanup of the devicetrees ARM: dts: imx6q-dhcom: Rearrange of iomux ARM: dts: imx6q-dhcom: Rework of the DHCOM GPIO pinctrls ARM: dts: imx6q-dhcom: Use 1G ethernet on the PDK2 board ARM: dts: imx6q-dhcom: Set minimum memory size of all DHCOM i.MX6 variants ARM: dts: imx6q-dhcom: Remove ddc-i2c-bus property ARM: dts: imx6q-dhcom: Add keys and leds to the PDK2 board ARM: dts: imx6q-dhcom: Align stdout-path with other DHCOM SoMs ARM: dts: imx6q-dhcom: Adding Wake pin to the PCIe pinctrl ARM: dts: imx6q-dhcom: Fill GPIO line names on DHCOM SoM ARM: dts: imx6q-dhcom: Add interrupt and compatible to the ethernet PHY ARM: dts: imx6q-dhcom: Add the parallel system bus ARM: dts: imx7d-remarkable2: Add WiFi support ... Link: https://lore.kernel.org/r/20210814133853.9981-2-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-17Merge tag 'imx-dt64-5.15' of ↵Arnd Bergmann26-65/+3021
git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into arm/dt i.MX arm64 device tree changes for 5.15: - New board support: Nitrogen8 SoM and MNT Reform2, LS1088A based Traverse Ten64, i.MX8M based GW7902. - A series from Ioana Ciornei to update PHY IRQ configuration for LayerScape SoCs. - A series from Tim Harvey to update Gateworks imx8mm-venice devices. - Replace deprecated `fsl,usbphy` property with phys phandle. - Add MIPI CSI phy and bridge descriptions for i.MX8MQ SoC. - Add JPEG encoder/decoder device nodes for i.MX8M SoCs. - Update PMU compatible and drop interrupt-affinity for i.MX8M SoCs. - Add Cadence HIFI4 DSP for i.MX8 MPlus SoC. - A few small and random updates on various boards. * tag 'imx-dt64-5.15' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (27 commits) arm64: dts: add device tree for Traverse Ten64 (LS1088A) arm64: dts: ls1088a: add missing PMU node arm64: dts: ls1088a: add internal PCS for DPMAC1 node arm64: dts: imx8mq-reform2: add sound support arm64: dts: imx8m: drop interrupt-affinity for pmu arm64: dts: imx8qxp: update pmu compatible arm64: dts: imx8mm: update pmu compatible arm64: dts: ls1046a: fix eeprom entries arm64: dts: imx8mm-venice-gw7901: enable pull-down on gpio outputs arm64: dts: imx8mm-venice-gw7901: add support for USB hub subload arm64: dts: imx8mm-venice-gw71xx: fix USB OTG VBUS arm64: dts: imx8mm-venice-gw700x: fix invalid pmic pin config arm64: dts: imx8mm-venice-gw700x: fix mp5416 pmic config arm64: dts: imx8mq: add mipi csi phy and csi bridge descriptions arm64: dts: imx: Add i.mx8mm/imx8mn Gateworks gw7902 dts support arm64: dts: imx8mp: Add dsp node arm64: dts: imx8m: Replace deprecated fsl,usbphy DT props with phys arm64: dts: imx8mq-evk: Remove unnecessary blank lines arm64: dts: imx8mq-evk: add CD pinctrl for usdhc2 arm64: dts: imx8mm-venice-gw7901: Remove unnecessary #address-cells/#size-cells ... Link: https://lore.kernel.org/r/20210814133853.9981-3-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-17Merge tag 'tegra-for-5.15-arm64-dt' of ↵Arnd Bergmann6-6/+816
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt arm64: tegra: Device tree changes for v5.15-rc1 Contains a couple of fixes across the board and adds support for the recently released NVIDIA Jetson TX2 NX Developer Kit. * tag 'tegra-for-5.15-arm64-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: arm64: tegra: Fix compatible string for Tegra132 CPUs arm64: tegra: Add missing interconnects property for USB on Tegra186 arm64: tegra: Add NVIDIA Jetson TX2 NX Developer Kit support arm64: tegra: Add PWM nodes on Tegra186 arm64: tegra194: p2888: Correct interrupt trigger type of temperature sensor arm64: tegra: Fix Tegra194 PCIe EP compatible string Link: https://lore.kernel.org/r/20210813162157.2820913-6-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-16Merge tag 'tegra-for-5.15-arm-dt' of ↵Arnd Bergmann12-62/+218
git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into arm/dt ARM: tegra: Device tree changes for v5.15-rc1 The majority of this is temperature sensor additions for various devices and fixes to the trigger type of the thermal interrupts. Other than that there are various minor fixes across the board. * tag 'tegra-for-5.15-arm-dt' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux: ARM: tegra: tamonten: Fix UART pad setting ARM: tegra: nexus7: Improve thermal zones ARM: tegra: acer-a500: Improve thermal zones ARM: tegra: acer-a500: Use verbose variant of atmel,wakeup-method value ARM: tegra: acer-a500: Add power supplies to accelerometer ARM: tegra: acer-a500: Remove bogus USB VBUS regulators ARM: tegra: jetson-tk1: Correct interrupt trigger type of temperature sensor ARM: tegra: dalmore: Correct interrupt trigger type of temperature sensor ARM: tegra: cardhu: Correct interrupt trigger type of temperature sensor ARM: tegra: apalis: Correct interrupt trigger type of temperature sensor ARM: tegra: nyan: Correct interrupt trigger type of temperature sensor ARM: tegra: acer-a500: Add interrupt to temperature sensor node ARM: tegra: nexus7: Add interrupt to temperature sensor node ARM: tegra: paz00: Add interrupt to temperature sensor node ARM: tegra: ouya: Add interrupt to temperature sensor node ARM: tegra: Add SoC thermal sensor to Tegra30 device-trees Link: https://lore.kernel.org/r/20210813162157.2820913-4-thierry.reding@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-16Merge tag 'amlogic-arm64-dt-for-v5.15-v2' of ↵Arnd Bergmann2-0/+122
git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into arm/dt Amlogic ARM64 DT changes for v5.15 part 2: - add audio to nodes vega-s95 - add audio to nodes nexbox-a1 * tag 'amlogic-arm64-dt-for-v5.15-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux: arm64: dts: meson: add audio playback to vega-s95 dtsi arm64: dts: meson: add audio playback to nexbox-a1 Link: https://lore.kernel.org/r/47d77095-eee7-bbd9-d3aa-1dabeea3f0b9@baylibre.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-16Merge tag 'renesas-arm-dt-for-v5.15-tag2' of ↵Arnd Bergmann3-0/+120
git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt Renesas ARM DT updates for v5.15 (take two) - Pin control, ADC, and CANFD support for the RZ/G2L SoC, - Add interrupt-names properties to the Renesas RZ/A and RZ/G2L I2C Bus Interface. * tag 'renesas-arm-dt-for-v5.15-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: dt-bindings: i2c: renesas,riic: Make interrupt-names required arm64: dts: renesas: r9a07g044: Add I2C interrupt-names ARM: dts: rza: Add I2C interrupt-names dt-bindings: i2c: renesas,riic: Add interrupt-names arm64: dts: renesas: r9a07g044: Add CANFD node arm64: dts: renesas: r9a07g044: Add ADC node arm64: dts: renesas: r9a07g044: Add pinctrl node dt-bindings: clock: r9a07g044-cpg: Add entry for P0_DIV2 core clock Link: https://lore.kernel.org/r/cover.1628849623.git.geert+renesas@glider.be Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2021-08-16ubd: use bvec_virtChristoph Hellwig1-2/+1
Use bvec_virt instead of open coding it. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-By: Anton Ivanov <anton.ivanov@cambridgegreys.com> Link: https://lore.kernel.org/r/20210804095634.460779-12-hch@lst.de Signed-off-by: Jens Axboe <axboe@kernel.dk>
2021-08-16arm64: dts: sc7180: Add required-opps for i2cRajendra Nayak1-0/+24
qup-i2c devices on sc7180 are clocked with a fixed clock (19.2 MHz) Though qup-i2c does not support DVFS, it still needs to vote for a performance state on 'CX' to satisfy the 19.2 Mhz clock frequency requirement. Use 'required-opps' to pass this information from device tree, and also add the power-domains property to specify the CX power-domain. Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Reviewed-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
2021-08-16Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds3-7/+17
Pull KVM fixes from Paolo Bonzini: "Two nested virtualization fixes for AMD processors" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: nSVM: always intercept VMLOAD/VMSAVE when nested (CVE-2021-3656) KVM: nSVM: avoid picking up unsupported bits from L2 in int_ctl (CVE-2021-3653)
2021-08-16tracing: Refactor TRACE_IRQFLAGS_SUPPORT in KconfigMasahiro Yamada27-64/+21
Make architectures select TRACE_IRQFLAGS_SUPPORT instead of having many defines. Link: https://lkml.kernel.org/r/20210731052233.4703-2-masahiroy@kernel.org Acked-by: Heiko Carstens <hca@linux.ibm.com> Acked-by: Vineet Gupta <vgupta@synopsys.com>   #arch/arc Acked-by: Michael Ellerman <mpe@ellerman.id.au> (powerpc) Acked-by: Catalin Marinas <catalin.marinas@arm.com> Acked-by: Max Filippov <jcmvbkbc@gmail.com> Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Signed-off-by: Steven Rostedt (VMware) <rostedt@goodmis.org>
2021-08-16KVM: nSVM: always intercept VMLOAD/VMSAVE when nested (CVE-2021-3656)Maxim Levitsky1-0/+3
If L1 disables VMLOAD/VMSAVE intercepts, and doesn't enable Virtual VMLOAD/VMSAVE (currently not supported for the nested hypervisor), then VMLOAD/VMSAVE must operate on the L1 physical memory, which is only possible by making L0 intercept these instructions. Failure to do so allowed the nested guest to run VMLOAD/VMSAVE unintercepted, and thus read/write portions of the host physical memory. Fixes: 89c8a4984fc9 ("KVM: SVM: Enable Virtual VMLOAD VMSAVE feature") Suggested-by: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-08-16KVM: nSVM: avoid picking up unsupported bits from L2 in int_ctl (CVE-2021-3653)Maxim Levitsky3-7/+14
* Invert the mask of bits that we pick from L2 in nested_vmcb02_prepare_control * Invert and explicitly use VIRQ related bits bitmask in svm_clear_vintr This fixes a security issue that allowed a malicious L1 to run L2 with AVIC enabled, which allowed the L2 to exploit the uninitialized and enabled AVIC to read/write the host physical memory at some offsets. Fixes: 3d6368ef580a ("KVM: SVM: Add VMRUN handler") Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-08-16Merge 5.14-rc6 into usb-nextGreg Kroah-Hartman35-153/+241
We need the USB fix in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-08-16powerpc/head_check: use stdout for error messagesRandy Dunlap1-6/+6
Prefer stderr instead of stdout for error messages. This is a good practice and can help CI error detecting and reporting (0day in this case). Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210815222334.9575-1-rdunlap@infradead.org
2021-08-16powerpc/pseries: Fix build error when NUMA=nMichael Ellerman1-1/+1
As reported by lkp, if NUMA=n we see a build error: arch/powerpc/platforms/pseries/hotplug-cpu.c: In function 'pseries_cpu_hotplug_init': arch/powerpc/platforms/pseries/hotplug-cpu.c:1022:8: error: 'node_to_cpumask_map' undeclared 1022 | node_to_cpumask_map[node]); Use cpumask_of_node() which has an empty stub for NUMA=n, and when NUMA=y does a lookup from node_to_cpumask_map[]. Fixes: bd1dd4c5f528 ("powerpc/pseries: Prevent free CPU ids being reused on another node") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210816041032.2839343-1-mpe@ellerman.id.au
2021-08-16ARM: dts: aspeed: cloudripper: Add comments for "mdio1"Tao Ren1-0/+5
Add some comments to explain the purpose of "mdio1" controller: it's connected to the MDC/MDIO interface of the on-board management switch. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Link: https://lore.kernel.org/r/20210813061900.24539-1-rentao.bupt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-08-16ARM: dts: aspeed: minipack: Update flash partition tableTao Ren1-4/+4
Update firmware flash "data0" partition size from 4MB to 8MB for larger persistent storage on minipack BMC. Signed-off-by: Tao Ren <rentao.bupt@gmail.com> Link: https://lore.kernel.org/r/20210720002704.7390-1-rentao.bupt@gmail.com Signed-off-by: Joel Stanley <joel@jms.id.au>
2021-08-15Merge tag 'powerpc-5.14-5' of ↵Linus Torvalds13-62/+82
git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux Pull powerpc fixes from Michael Ellerman: - Fix crashes coming out of nap on 32-bit Book3s (eg. powerbooks). - Fix critical and debug interrupts on BookE, seen as crashes when using ptrace. - Fix an oops when running an SMP kernel on a UP system. - Update pseries LPAR security flavor after partition migration. - Fix an oops when using kprobes on BookE. - Fix oops on 32-bit pmac by not calling do_IRQ() from timer_interrupt(). - Fix softlockups on CPU hotplug into a CPU-less node with xive (P9). Thanks to Cédric Le Goater, Christophe Leroy, Finn Thain, Geetika Moolchandani, Laurent Dufour, Laurent Vivier, Nicholas Piggin, Pu Lehui, Radu Rendec, Srikar Dronamraju, and Stan Johnson. * tag 'powerpc-5.14-5' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: powerpc/xive: Do not skip CPU-less nodes when creating the IPIs powerpc/interrupt: Do not call single_step_exception() from other exceptions powerpc/interrupt: Fix OOPS by not calling do_IRQ() from timer_interrupt() powerpc/kprobes: Fix kprobe Oops happens in booke powerpc/pseries: Fix update of LPAR security flavor after LPM powerpc/smp: Fix OOPS in topology_init() powerpc/32: Fix critical and debug interrupts on BOOKE powerpc/32s: Fix napping restore in data storage interrupt (DSI)
2021-08-15Merge tag 'irq-urgent-2021-08-15' of ↵Linus Torvalds3-6/+13
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull irq fixes from Thomas Gleixner: "A set of fixes for PCI/MSI and x86 interrupt startup: - Mask all MSI-X entries when enabling MSI-X otherwise stale unmasked entries stay around e.g. when a crashkernel is booted. - Enforce masking of a MSI-X table entry when updating it, which mandatory according to speification - Ensure that writes to MSI[-X} tables are flushed. - Prevent invalid bits being set in the MSI mask register - Properly serialize modifications to the mask cache and the mask register for multi-MSI. - Cure the violation of the affinity setting rules on X86 during interrupt startup which can cause lost and stale interrupts. Move the initial affinity setting ahead of actualy enabling the interrupt. - Ensure that MSI interrupts are completely torn down before freeing them in the error handling case. - Prevent an array out of bounds access in the irq timings code" * tag 'irq-urgent-2021-08-15' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: driver core: Add missing kernel doc for device::msi_lock genirq/msi: Ensure deactivation on teardown genirq/timings: Prevent potential array overflow in __irq_timings_store() x86/msi: Force affinity setup before startup x86/ioapic: Force affinity setup before startup genirq: Provide IRQCHIP_AFFINITY_PRE_STARTUP PCI/MSI: Protect msi_desc::masked for multi-MSI PCI/MSI: Use msi_mask_irq() in pci_msi_shutdown() PCI/MSI: Correct misleading comments PCI/MSI: Do not set invalid bits in MSI mask PCI/MSI: Enforce MSI[X] entry updates to be visible PCI/MSI: Enforce that MSI-X table entry is masked for update PCI/MSI: Mask all unused MSI-X entries PCI/MSI: Enable and mask MSI-X early
2021-08-15Merge tag 'x86_urgent_for_v5.14_rc6' of ↵Linus Torvalds2-14/+14
git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip Pull x86 fixes from Borislav Petkov: "Two fixes: - An objdump checker fix to ignore parenthesized strings in the objdump version - Fix resctrl default monitoring groups reporting when new subgroups get created" * tag 'x86_urgent_for_v5.14_rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: x86/resctrl: Fix default monitoring groups reporting x86/tools: Fix objdump version check again
2021-08-15Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds9-58/+114
Pull KVM fixes from Paolo Bonzini: "ARM: - Plug race between enabling MTE and creating vcpus - Fix off-by-one bug when checking whether an address range is RAM x86: - Fixes for the new MMU, especially a memory leak on hosts with <39 physical address bits - Remove bogus EFER.NX checks on 32-bit non-PAE hosts - WAITPKG fix" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: KVM: x86/mmu: Protect marking SPs unsync when using TDP MMU with spinlock KVM: x86/mmu: Don't step down in the TDP iterator when zapping all SPTEs KVM: x86/mmu: Don't leak non-leaf SPTEs when zapping all SPTEs KVM: nVMX: Use vmx_need_pf_intercept() when deciding if L0 wants a #PF kvm: vmx: Sync all matching EPTPs when injecting nested EPT fault KVM: x86: remove dead initialization KVM: x86: Allow guest to set EFER.NX=1 on non-PAE 32-bit kernels KVM: VMX: Use current VMCS to query WAITPKG support for MSR emulation KVM: arm64: Fix race when enabling KVM_ARM_CAP_MTE KVM: arm64: Fix off-by-one in range_is_memory
2021-08-15powerpc: Add "-z notext" flag to disable diagnosticFangrui Song1-0/+1
Object files used to link .tmp_vmlinux.kallsyms1 have many R_PPC64_ADDR64 relocations in non-SHF_WRITE sections. There are many text relocations (e.g. in .rela___ksymtab_gpl+* and .rela__mcount_loc sections) in a -pie link and are disallowed by LLD: ld.lld: error: can't create dynamic relocation R_PPC64_ADDR64 against local symbol in readonly segment; recompile object files with -fPIC or pass '-Wl,-z,notext' to allow text relocations in the output >>> defined in arch/powerpc/kernel/head_64.o >>> referenced by arch/powerpc/kernel/head_64.o:(__restart_table+0x10) Newer GNU ld configured with "--enable-textrel-check=error" will report an error as well: $ ld-new -EL -m elf64lppc -pie ... -o .tmp_vmlinux.kallsyms1 ... ld-new: read-only segment has dynamic relocations Add "-z notext" to suppress the errors. Non-CONFIG_RELOCATABLE builds use the default -no-pie mode and thus R_PPC64_ADDR64 relocations can be resolved at link-time. Reported-by: Itaru Kitayama <itaru.kitayama@riken.jp> Co-developed-by: Bill Wendling <morbo@google.com> Signed-off-by: Fangrui Song <maskray@google.com> Signed-off-by: Bill Wendling <morbo@google.com> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/20210813200511.1905703-1-morbo@google.com
2021-08-15powerpc/bug: Provide better flexibility to WARN_ON/__WARN_FLAGS() with asm gotoChristophe Leroy7-24/+70
Using asm goto in __WARN_FLAGS() and WARN_ON() allows more flexibility to GCC. For that add an entry to the exception table so that program_check_exception() knowns where to resume execution after a WARNING. Here are two exemples. The first one is done on PPC32 (which benefits from the previous patch), the second is on PPC64. unsigned long test(struct pt_regs *regs) { int ret; WARN_ON(regs->msr & MSR_PR); return regs->gpr[3]; } unsigned long test9w(unsigned long a, unsigned long b) { if (WARN_ON(!b)) return 0; return a / b; } Before the patch: 000003a8 <test>: 3a8: 81 23 00 84 lwz r9,132(r3) 3ac: 71 29 40 00 andi. r9,r9,16384 3b0: 40 82 00 0c bne 3bc <test+0x14> 3b4: 80 63 00 0c lwz r3,12(r3) 3b8: 4e 80 00 20 blr 3bc: 0f e0 00 00 twui r0,0 3c0: 80 63 00 0c lwz r3,12(r3) 3c4: 4e 80 00 20 blr 0000000000000bf0 <.test9w>: bf0: 7c 89 00 74 cntlzd r9,r4 bf4: 79 29 d1 82 rldicl r9,r9,58,6 bf8: 0b 09 00 00 tdnei r9,0 bfc: 2c 24 00 00 cmpdi r4,0 c00: 41 82 00 0c beq c0c <.test9w+0x1c> c04: 7c 63 23 92 divdu r3,r3,r4 c08: 4e 80 00 20 blr c0c: 38 60 00 00 li r3,0 c10: 4e 80 00 20 blr After the patch: 000003a8 <test>: 3a8: 81 23 00 84 lwz r9,132(r3) 3ac: 71 29 40 00 andi. r9,r9,16384 3b0: 40 82 00 0c bne 3bc <test+0x14> 3b4: 80 63 00 0c lwz r3,12(r3) 3b8: 4e 80 00 20 blr 3bc: 0f e0 00 00 twui r0,0 0000000000000c50 <.test9w>: c50: 7c 89 00 74 cntlzd r9,r4 c54: 79 29 d1 82 rldicl r9,r9,58,6 c58: 0b 09 00 00 tdnei r9,0 c5c: 7c 63 23 92 divdu r3,r3,r4 c60: 4e 80 00 20 blr c70: 38 60 00 00 li r3,0 c74: 4e 80 00 20 blr In the first exemple, we see GCC doesn't need to duplicate what happens after the trap. In the second exemple, we see that GCC doesn't need to emit a test and a branch in the likely path in addition to the trap. We've got some WARN_ON() in .softirqentry.text section so it needs to be added in the OTHER_TEXT_SECTIONS in modpost.c Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/389962b1b702e3c78d169e59bcfac56282889173.1618331882.git.christophe.leroy@csgroup.eu
2021-08-14Merge tag 'riscv-for-linus-5.14-rc6' of ↵Linus Torvalds2-2/+2
git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux Pull RISC-V fixes from Palmer Dabbelt: - avoid passing -mno-relax to compilers that don't support it - a comment fix * tag 'riscv-for-linus-5.14-rc6' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux: riscv: Fix comment regarding kernel mapping overlapping with IS_ERR_VALUE riscv: kexec: do not add '-mno-relax' flag if compiler doesn't support it
2021-08-14powerpc/bug: Remove specific powerpc BUG_ON() and WARN_ON() on PPC32Christophe Leroy1-3/+6
powerpc BUG_ON() and WARN_ON() are based on using twnei instruction. For catching simple conditions like a variable having value 0, this is efficient because it does the test and the trap at the same time. But most conditions used with BUG_ON or WARN_ON are more complex and forces GCC to format the condition into a 0 or 1 value in a register. This will usually require 2 to 3 instructions. The most efficient solution would be to use __builtin_trap() because GCC is able to optimise the use of the different trap instructions based on the requested condition, but this is complex if not impossible for the following reasons: - __builtin_trap() is a non-recoverable instruction, so it can't be used for WARN_ON - Knowing which line of code generated the trap would require the analysis of DWARF information. This is not a feature we have today. As mentioned in commit 8d4fbcfbe0a4 ("Fix WARN_ON() on bitfield ops") the way WARN_ON() is implemented is suboptimal. That commit also mentions an issue with 'long long' condition. It fixed it for WARN_ON() but the same problem still exists today with BUG_ON() on PPC32. It will be fixed by using the generic implementation. By using the generic implementation, gcc will naturally generate a branch to the unconditional trap generated by BUG(). As modern powerpc implement zero-cycle branch, that's even more efficient. And for the functions using WARN_ON() and its return, the test on return from WARN_ON() is now also used for the WARN_ON() itself. On PPC64 we don't want it because we want to be able to use CFAR register to track how we entered the code that trapped. The CFAR register would be clobbered by the branch. A simple test function: unsigned long test9w(unsigned long a, unsigned long b) { if (WARN_ON(!b)) return 0; return a / b; } Before the patch: 0000046c <test9w>: 46c: 7c 89 00 34 cntlzw r9,r4 470: 55 29 d9 7e rlwinm r9,r9,27,5,31 474: 0f 09 00 00 twnei r9,0 478: 2c 04 00 00 cmpwi r4,0 47c: 41 82 00 0c beq 488 <test9w+0x1c> 480: 7c 63 23 96 divwu r3,r3,r4 484: 4e 80 00 20 blr 488: 38 60 00 00 li r3,0 48c: 4e 80 00 20 blr After the patch: 00000468 <test9w>: 468: 2c 04 00 00 cmpwi r4,0 46c: 41 82 00 0c beq 478 <test9w+0x10> 470: 7c 63 23 96 divwu r3,r3,r4 474: 4e 80 00 20 blr 478: 0f e0 00 00 twui r0,0 47c: 38 60 00 00 li r3,0 480: 4e 80 00 20 blr So we see before the patch we need 3 instructions on the likely path to handle the WARN_ON(). With the patch the trap goes on the unlikely path. See below the difference at the entry of system_call_exception where we have several BUG_ON(), allthough less impressing. With the patch: 00000000 <system_call_exception>: 0: 81 6a 00 84 lwz r11,132(r10) 4: 90 6a 00 88 stw r3,136(r10) 8: 71 60 00 02 andi. r0,r11,2 c: 41 82 00 70 beq 7c <system_call_exception+0x7c> 10: 71 60 40 00 andi. r0,r11,16384 14: 41 82 00 6c beq 80 <system_call_exception+0x80> 18: 71 6b 80 00 andi. r11,r11,32768 1c: 41 82 00 68 beq 84 <system_call_exception+0x84> 20: 94 21 ff e0 stwu r1,-32(r1) 24: 93 e1 00 1c stw r31,28(r1) 28: 7d 8c 42 e6 mftb r12 ... 7c: 0f e0 00 00 twui r0,0 80: 0f e0 00 00 twui r0,0 84: 0f e0 00 00 twui r0,0 Without the patch: 00000000 <system_call_exception>: 0: 94 21 ff e0 stwu r1,-32(r1) 4: 93 e1 00 1c stw r31,28(r1) 8: 90 6a 00 88 stw r3,136(r10) c: 81 6a 00 84 lwz r11,132(r10) 10: 69 60 00 02 xori r0,r11,2 14: 54 00 ff fe rlwinm r0,r0,31,31,31 18: 0f 00 00 00 twnei r0,0 1c: 69 60 40 00 xori r0,r11,16384 20: 54 00 97 fe rlwinm r0,r0,18,31,31 24: 0f 00 00 00 twnei r0,0 28: 69 6b 80 00 xori r11,r11,32768 2c: 55 6b 8f fe rlwinm r11,r11,17,31,31 30: 0f 0b 00 00 twnei r11,0 34: 7d 8c 42 e6 mftb r12 Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au> Link: https://lore.kernel.org/r/b286e07fb771a664b631cd07a40b09c06f26e64b.1618331881.git.christophe.leroy@csgroup.eu
2021-08-14arm64: dts: add device tree for Traverse Ten64 (LS1088A)Mathew McBride2-0/+390
The Traverse Technologies Ten64 is a Mini-ITX form factor networking board using the NXP LS1088A SoC. This device tree only describes features which the mainline kernel currently has support for, such as some I2C-connected devices that are not described at present. System documentation may be found at ten64doc.traverse.com.au Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> # for the MAC/PHY Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-08-14arm64: dts: ls1088a: add missing PMU nodeMathew McBride1-0/+5
The Performance Manager Unit was not described in the DTS which meant performance event monitoring was not possible. This was exposed by a change to the PMU handling in KVM in 5.11-rc3 which now prevents a PMU being exposed to a guest when the host does not provide one: "KVM: arm64: Don't access PMCR_EL0 when no PMU is available" Signed-off-by: Mathew McBride <matt@traverse.com.au> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-08-14arm64: dts: ls1088a: add internal PCS for DPMAC1 nodeMathew McBride1-0/+13
A previous patch added the PCS for DPMAC2 only, as used for the AQR PHY on the LS1088ARDB. DPMAC1 PCS access is required for PHYLINK SFP support on the Traverse Ten64 board. Signed-off-by: Mathew McBride <matt@traverse.com.au> Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2021-08-14ARM: dts: imx6qp-prtwd3: configure ENET_REF clock to 125MHzOleksij Rempel1-0/+2
By default ENET_REF is configured to 50MHz, which is usable for the RMII link. In case RGMII is used, we need 125MHz clock. Signed-off-by: Oleksij Rempel <o.rempel@pengutronix.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org>
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