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2023-11-06KVM: arm/arm64: downgrade preempt_disable()d region to migrate_disable()Josh Cartwright1-3/+3
kvm_arch_vcpu_ioctl_run() disables the use of preemption when updating the vgic and timer states to prevent the calling task from migrating to another CPU. It does so to prevent the task from writing to the incorrect per-CPU GIC distributor registers. On -rt kernels, it's possible to maintain the same guarantee with the use of migrate_{disable,enable}(), with the added benefit that the migrate-disabled region is preemptible. Update kvm_arch_vcpu_ioctl_run() to do so. Cc: Christoffer Dall <christoffer.dall@linaro.org> Reported-by: Manish Jaggi <Manish.Jaggi@caviumnetworks.com> Signed-off-by: Josh Cartwright <joshc@ni.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06ARM: enable irq in translation/section permission fault handlersYadi.hu1-0/+6
Probably happens on all ARM, with CONFIG_PREEMPT_RT CONFIG_DEBUG_ATOMIC_SLEEP This simple program.... int main() { *((char*)0xc0001000) = 0; }; [ 512.742724] BUG: sleeping function called from invalid context at kernel/rtmutex.c:658 [ 512.743000] in_atomic(): 0, irqs_disabled(): 128, pid: 994, name: a [ 512.743217] INFO: lockdep is turned off. [ 512.743360] irq event stamp: 0 [ 512.743482] hardirqs last enabled at (0): [< (null)>] (null) [ 512.743714] hardirqs last disabled at (0): [<c0426370>] copy_process+0x3b0/0x11c0 [ 512.744013] softirqs last enabled at (0): [<c0426370>] copy_process+0x3b0/0x11c0 [ 512.744303] softirqs last disabled at (0): [< (null)>] (null) [ 512.744631] [<c041872c>] (unwind_backtrace+0x0/0x104) [ 512.745001] [<c09af0c4>] (dump_stack+0x20/0x24) [ 512.745355] [<c0462490>] (__might_sleep+0x1dc/0x1e0) [ 512.745717] [<c09b6770>] (rt_spin_lock+0x34/0x6c) [ 512.746073] [<c0441bf0>] (do_force_sig_info+0x34/0xf0) [ 512.746457] [<c0442668>] (force_sig_info+0x18/0x1c) [ 512.746829] [<c041d880>] (__do_user_fault+0x9c/0xd8) [ 512.747185] [<c041d938>] (do_bad_area+0x7c/0x94) [ 512.747536] [<c041d990>] (do_sect_fault+0x40/0x48) [ 512.747898] [<c040841c>] (do_DataAbort+0x40/0xa0) [ 512.748181] Exception stack(0xecaa1fb0 to 0xecaa1ff8) Oxc0000000 belongs to kernel address space, user task can not be allowed to access it. For above condition, correct result is that test case should receive a “segment fault” and exits but not stacks. the root cause is commit 02fe2845d6a8 ("avoid enabling interrupts in prefetch/data abort handlers"),it deletes irq enable block in Data abort assemble code and move them into page/breakpiont/alignment fault handlers instead. But author does not enable irq in translation/section permission fault handlers. ARM disables irq when it enters exception/ interrupt mode, if kernel doesn't enable irq, it would be still disabled during translation/section permission fault. We see the above splat because do_force_sig_info is still called with IRQs off, and that code eventually does a: spin_lock_irqsave(&t->sighand->siglock, flags); As this is architecture independent code, and we've not seen any other need for other arch to have the siglock converted to raw lock, we can conclude that we should enable irq for ARM translation/section permission exception. Signed-off-by: Yadi.hu <yadi.hu@windriver.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06arch/arm64: Add lazy preempt supportAnders Roxell5-3/+34
arm64 is missing support for PREEMPT_RT. The main feature which is lacking is support for lazy preemption. The arch-specific entry code, thread information structure definitions, and associated data tables have to be extended to provide this support. Then the Kconfig file has to be extended to indicate the support is available, and also to indicate that support for full RT preemption is now available. Signed-off-by: Anders Roxell <anders.roxell@linaro.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06powerpc: Add support for lazy preemptionThomas Gleixner3-2/+14
Implement the powerpc pieces for lazy preempt. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06arm: Add support for lazy preemptionThomas Gleixner5-5/+25
Implement the arm pieces for lazy preempt. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06entry: Fix the preempt lazy falloutThomas Gleixner1-2/+0
Common code needs common defines.... Fixes: f2f9e496208c ("x86: Support for lazy preemption") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06x86: Support for lazy preemptionThomas Gleixner3-1/+40
Implement the x86 pieces for lazy preempt. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06x86: Enable RT also on 32bitSebastian Andrzej Siewior1-1/+1
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06x86: Allow to enable RTSebastian Andrzej Siewior1-0/+1
Allow to select RT. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06x86: kvm Require const tsc for RTThomas Gleixner1-0/+8
Non constant TSC is a nightmare on bare metal already, but with virtualization it becomes a complete disaster because the workarounds are horrible latency wise. That's also a preliminary for running RT in a guest on top of a RT host. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06signal/x86: Delay calling signals in atomicOleg Nesterov1-0/+13
On x86_64 we must disable preemption before we enable interrupts for stack faults, int3 and debugging, because the current task is using a per CPU debug stack defined by the IST. If we schedule out, another task can come in and use the same stack and cause the stack to be corrupted and crash the kernel on return. When CONFIG_PREEMPT_RT is enabled, spin_locks become mutexes, and one of these is the spin lock used in signal handling. Some of the debug code (int3) causes do_trap() to send a signal. This function calls a spin lock that has been converted to a mutex and has the possibility to sleep. If this happens, the above issues with the corrupted stack is possible. Instead of calling the signal right away, for PREEMPT_RT and x86_64, the signal information is stored on the stacks task_struct and TIF_NOTIFY_RESUME is set. Then on exit of the trap, the signal resume code will send the signal when preemption is enabled. [ rostedt: Switched from #ifdef CONFIG_PREEMPT_RT to ARCH_RT_DELAYS_SIGNAL_SEND and added comments to the code. ] Signed-off-by: Oleg Nesterov <oleg@redhat.com> Signed-off-by: Steven Rostedt <rostedt@goodmis.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> [bigeasy: also needed on 32bit as per Yang Shi <yang.shi@linaro.org>] Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06ARM64: Allow to enable RTSebastian Andrzej Siewior1-0/+2
Allow to select RT. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06*/softirq: Disable softirq stacks on PREEMPT_RTThomas Gleixner3-0/+8
PREEMPT_RT preempts softirqs and the current implementation avoids do_softirq_own_stack() and only uses __do_softirq(). Disable the unused softirqs stacks on PREEMPT_RT to safe some memory and ensure that do_softirq_own_stack() is not used which is not expected. [bigeasy: commit description.] Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
2023-11-06random: Make it work on rtThomas Gleixner1-1/+2
Delegate the random insertion to the forced threaded interrupt handler. Store the return IP of the hard interrupt handler in the irq descriptor and feed it into the random generator as a source of entropy. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06x86: stackprotector: Avoid random pool on rtThomas Gleixner1-1/+7
CPU bringup calls into the random pool to initialize the stack canary. During boot that works nicely even on RT as the might sleep checks are disabled. During CPU hotplug the might sleep checks trigger. Making the locks in random raw is a major PITA, so avoid the call on RT is the only sensible solution. This is basically the same randomness which we get during boot where the random pool has no entropy and we rely on the TSC randomnness. Reported-by: Carsten Emde <carsten.emde@osadl.org> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06locking: Allow to include asm/spinlock_types.h from linux/spinlock_types_raw.hSebastian Andrzej Siewior12-12/+12
The printk header file includes ratelimit_types.h for its __ratelimit() based usage. It requires it for the static initializer used in printk_ratelimited(). It uses a raw_spinlock_t and includes the spinlock_types.h. It makes no difference on non PREEMPT-RT builds but PREEMPT-RT replaces the inner part of some locks and therefore includes rtmutex.h and atomic.h which leads to recursive includes where defines are missing. By including only the raw_spinlock_t defines it avoids the atomic.h related includes at this stage. An example on powerpc: | CALL scripts/atomic/check-atomics.sh |In file included from include/linux/bug.h:5, | from include/linux/page-flags.h:10, | from kernel/bounds.c:10: |arch/powerpc/include/asm/page_32.h: In function ‘clear_page’: |arch/powerpc/include/asm/bug.h:87:4: error: implicit declaration of function ‘__WARN’ [-Werror=implicit-function-declaration] | 87 | __WARN(); \ | | ^~~~~~ |arch/powerpc/include/asm/page_32.h:48:2: note: in expansion of macro ‘WARN_ON’ | 48 | WARN_ON((unsigned long)addr & (L1_CACHE_BYTES - 1)); | | ^~~~~~~ |arch/powerpc/include/asm/bug.h:58:17: error: invalid application of ‘sizeof’ to incomplete type ‘struct bug_entry’ | 58 | "i" (sizeof(struct bug_entry)), \ | | ^~~~~~ |arch/powerpc/include/asm/bug.h:89:3: note: in expansion of macro ‘BUG_ENTRY’ | 89 | BUG_ENTRY(PPC_TLNEI " %4, 0", \ | | ^~~~~~~~~ |arch/powerpc/include/asm/page_32.h:48:2: note: in expansion of macro ‘WARN_ON’ | 48 | WARN_ON((unsigned long)addr & (L1_CACHE_BYTES - 1)); | | ^~~~~~~ |In file included from arch/powerpc/include/asm/ptrace.h:298, | from arch/powerpc/include/asm/hw_irq.h:12, | from arch/powerpc/include/asm/irqflags.h:12, | from include/linux/irqflags.h:16, | from include/asm-generic/cmpxchg-local.h:6, | from arch/powerpc/include/asm/cmpxchg.h:526, | from arch/powerpc/include/asm/atomic.h:11, | from include/linux/atomic.h:7, | from include/linux/rwbase_rt.h:6, | from include/linux/rwlock_types.h:55, | from include/linux/spinlock_types.h:74, | from include/linux/ratelimit_types.h:7, | from include/linux/printk.h:10, | from include/asm-generic/bug.h:22, | from arch/powerpc/include/asm/bug.h:109, | from include/linux/bug.h:5, | from include/linux/page-flags.h:10, | from kernel/bounds.c:10: |include/linux/thread_info.h: In function ‘copy_overflow’: |include/linux/thread_info.h:210:2: error: implicit declaration of function ‘WARN’ [-Werror=implicit-function-declaration] | 210 | WARN(1, "Buffer overflow detected (%d < %lu)!\n", size, count); | | ^~~~ The WARN / BUG include pulls in printk.h and then ptrace.h expects WARN (from bug.h) which is not yet complete. Even hw_irq.h has WARN_ON() statements. On POWERPC64 there are missing atomic64 defines while building 32bit VDSO: | VDSO32C arch/powerpc/kernel/vdso32/vgettimeofday.o |In file included from include/linux/atomic.h:80, | from include/linux/rwbase_rt.h:6, | from include/linux/rwlock_types.h:55, | from include/linux/spinlock_types.h:74, | from include/linux/ratelimit_types.h:7, | from include/linux/printk.h:10, | from include/linux/kernel.h:19, | from arch/powerpc/include/asm/page.h:11, | from arch/powerpc/include/asm/vdso/gettimeofday.h:5, | from include/vdso/datapage.h:137, | from lib/vdso/gettimeofday.c:5, | from <command-line>: |include/linux/atomic-arch-fallback.h: In function ‘arch_atomic64_inc’: |include/linux/atomic-arch-fallback.h:1447:2: error: implicit declaration of function ‘arch_atomic64_add’; did you mean ‘arch_atomic_add’? [-Werror=impl |icit-function-declaration] | 1447 | arch_atomic64_add(1, v); | | ^~~~~~~~~~~~~~~~~ | | arch_atomic_add The generic fallback is not included, atomics itself are not used. If kernel.h does not include printk.h then it comes later from the bug.h include. Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
2023-11-06jump-label: disable if stop_machine() is usedThomas Gleixner1-1/+1
Some architectures are using stop_machine() while switching the opcode which leads to latency spikes. The architectures which use stop_machine() atm: - ARM stop machine - s390 stop machine The architecures which use other sorcery: - MIPS - X86 - powerpc - sparc - arm64 Signed-off-by: Thomas Gleixner <tglx@linutronix.de> [bigeasy: only ARM for now] Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06x86/softirq: Disable softirq stacks on PREEMPT_RTThomas Gleixner2-0/+5
PREEMPT_RT preempts softirqs and the current implementation avoids do_softirq_own_stack() and only uses __do_softirq(). Disable the unused softirqs stacks on PREEMPT_RT to safe some memory and ensure that do_softirq_own_stack() is not used which is not expected. [bigeasy: commit description.] Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Link: https://lore.kernel.org/r/20210924161245.2357247-1-bigeasy@linutronix.de
2023-11-06printk: remove deferred printingJohn Ogness7-19/+12
Since printing occurs either atomically or from the printing kthread, there is no need for any deferring or tracking possible recursion paths. Remove all printk defer functions and context tracking. Signed-off-by: John Ogness <john.ogness@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06console: add write_atomic interfaceJohn Ogness4-4/+21
Add a write_atomic() callback to the console. This is an optional function for console drivers. The function must be atomic (including NMI safe) for writing to the console. Console drivers must still implement the write() callback. The write_atomic() callback will only be used in special situations, such as when the kernel panics. Creating an NMI safe write_atomic() that must synchronize with write() requires a careful implementation of the console driver. To aid with the implementation, a set of console_atomic_*() functions are provided: void console_atomic_lock(unsigned long flags); void console_atomic_unlock(unsigned long flags); These functions synchronize using the printk cpulock and disable hardware interrupts. kgdb makes use of its own cpulock (@dbg_master_lock, @kgdb_active) during cpu roundup. This will conflict with the printk cpulock. Therefore, a CPU must ensure that it is not holding the printk cpulock when calling kgdb_cpu_enter(). If it is, it must allow its printk context to complete first. A new helper function kgdb_roundup_delay() is introduced for kgdb to determine if it is holding the printk cpulock. If so, a flag is set so that when the printk cpulock is released, kgdb will be re-triggered for that CPU. Signed-off-by: John Ogness <john.ogness@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
2023-11-06arm64: mm: Make arch_faults_on_old_pte() check for migratabilityValentin Schneider1-1/+1
arch_faults_on_old_pte() relies on the calling context being non-preemptible. CONFIG_PREEMPT_RT turns the PTE lock into a sleepable spinlock, which doesn't disable preemption once acquired, triggering the warning in arch_faults_on_old_pte(). It does however disable migration, ensuring the task remains on the same CPU during the entirety of the critical section, making the read of cpu_has_hw_af() safe and stable. Make arch_faults_on_old_pte() check migratable() instead of preemptible(). Signed-off-by: Valentin Schneider <valentin.schneider@arm.com> Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Link: https://lore.kernel.org/r/20210811201354.1976839-5-valentin.schneider@arm.com
2023-10-19Merge branch 'CR_7889_vf2_qspi_5.15_ziv.xu' into 'vf2-515-devel'andy.hu1-0/+33
CR_7889_vf2_qspi_5.15_ziv.xu See merge request sbc/linux!173
2023-10-18Merge tag 'JH7110_515_SDK_v5.8.1' into vf2-515-develAndy Hu2-27/+33
2023-10-16riscv: dts: starfive: modify qspi dtsziv.xu1-0/+33
modify qspi dts Signed-off-by: ziv.xu <ziv.xu@starfive.com>
2023-10-16riscv: dts: starfive: modify qspi dtsziv.xu2-27/+33
modify qspi dts Signed-off-by: ziv.xu <ziv.xu@starfive.com>
2023-09-12riscv: drm: panel: update radxa panel startup process and support ↵shengyang.chen2-22/+6
accelerator-sc7a20 mention: this patch is to solve the problem that radxa 8inch use i2c addr 0x19 which conflict with accelerator-sc7a20. Then enable accelerator-sc7a20 1.update radxa panel startup process to support both radxa 10inch and radxa 8inch in one driver 2.add accelerator-sc7a20 i2c probe process into radxa panel driver Signed-off-by: Shengyang Chen <shengyang.chen@starfivetech.com>
2023-09-01Merge tag 'JH7110_515_SDK_v5.7.1' into vf2-515-develAndy Hu1-1/+1
2023-08-31riscv: dts: starfive: Correct the name of clock for dmaWalker Chen1-1/+1
Fix the bug that dma driver failed to init as the wrong clock name. Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
2023-08-31Merge branch 'CR_6872_bluetooth_5.15_ziv.xu' into 'vf2-515-devel'andy.hu1-0/+1
CR_6872_bluetooth_5.15_ziv.xu See merge request sbc/linux!167
2023-08-31Merge tag 'JH7110_515_SDK_v5.7.0' into vf2-515-develAndy Hu1-11/+12
2023-08-30riscv: dts: starfive: jh7110: add dma-coherent for vpu/jpuSamin Guo1-0/+3
Use DMA-Coherent to avoid DIRECT_REMAP when allocating DMA buffers Signed-off-by: Samin Guo <samin.guo@starfivetech.com>
2023-08-29riscv: dts: starfive: change some properties of DMA nodeWalker Chen1-11/+9
Need to change some properties as DMA driver changes. Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
2023-08-29riscv: configs: enable uhid in starfive_visionfive2_defconfigziv.xu1-0/+1
enable uhid in starfive_visionfive2_defconfig Signed-off-by: ziv.xu <ziv.xu@starfive.com>
2023-08-22Merge branch 'CR_7073_vf2_515_newrd10_shengyang.chen' into 'vf2-515-devel'VF2_v3.6.1andy.hu1-15/+17
CR 7073 vf2 515: riscv: drm: panel: mass production radxa 10inch panel support See merge request sbc/linux!164
2023-08-22Merge tag 'JH7110_515_SDK_v5.6.1' into vf2-515-develAndy Hu1-2/+1
2023-08-22riscv: drm: panel: mass production radxa 10inch panel supportshengyang.chen1-15/+17
change radxa 10inch support from sample to mass production Signed-off-by: Shengyang Chen <shengyang.chen@starfivetech.com>
2023-08-17Merge branch 'CR_4379_hifi_sof_515_carter.li' into 'vf2-515-devel'andy.hu8-28/+184
CR_4379: sound:hifi4: Sound Open Firmware for hifi4 on vf2 See merge request sbc/linux!138
2023-08-17riscv: configs: disable CONFIG_DEBUG_ATOMIC_SLEEP in ↵ziv.xu1-1/+0
starfive_visionfive2_defconfig disable CONFIG_DEBUG_ATOMIC_SLEEP in starfive_visionfive2_defconfig Signed-off-by: ziv.xu <ziv.xu@starfive.com>
2023-08-17riscv: configs: disable CONFIG_DEBUG_ATOMIC_SLEEP in starfive_jh7110_defconfigziv.xu1-2/+1
disable CONFIG_DEBUG_ATOMIC_SLEEP in starfive_jh7110_defconfig Signed-off-by: ziv.xu <ziv.xu@starfive.com>
2023-08-14riscv: config: hifi4: add sof default config for starfivecarter.li1-1/+7
add sof default config and change mailbox's config to y, because sof need mailbox for ipc. Signed-off-by: carter.li <carter.li@starfivetech.com>
2023-08-14riscv: dts: starfive: add sof dsp node for hifi4carter.li7-27/+177
init sof_wm8960.dtsi, add sof_dsp node for sof hifi4. Signed-off-by: carter.li <carter.li@starfivetech.com>
2023-08-09riscv: dts: starfive: pwm backlight support for vf2shengyang.chen2-0/+52
pwm backlight support for vf2 Signed-off-by: Shengyang Chen <shengyang.chen@starfivetech.com>
2023-08-07CR 6852 Media:wave5: enable wave5 v4l2 decoder in vf2 defconfigSom Qin1-0/+2
2023-08-07Merge tag 'JH7110_515_SDK_v5.5.0' into vf2-515-develAndy Hu1-0/+2
2023-08-03Media:Wave5: Vpu driver in jh7110deconfig builded as module, not buildin.Som Qin1-1/+1
Signed-off-by: Som Qin <som.qin@starfivetech.com>
2023-08-03media: add wave511 v4l2 support for starfive platfromSom Qin1-1/+1
Signed-off-by: Som Qin <som.qin@starfivetech.com>
2023-08-03media: add wave5 v4l2 driver from mail listSom Qin1-0/+2
Signed-off-by: Som Qin <som.qin@starfivetech.com>
2023-08-03Merge branch 'CR_6864_SD_515_william.qiu' into 'vf2-515-devel'VF2_v3.4.5andy.hu1-0/+1
CR_6864: riscv: dts: starfive: change sd speed mode to highspeed See merge request sbc/linux!148
2023-08-03Merge tag 'JH7110_515_SDK_v5.4.4' into vf2-515-develAndy Hu1-0/+1
2023-08-02riscv: dts: starfive: change sd speed mode to highspeedWilliam Qiu1-0/+1
change sd speed mode to highspeed Signed-off-by: William Qiu <william.qiu@starfivetech.com>
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