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2021-04-06MIPS: kernel: Remove not needed set_fs callsThomas Bogendoerfer1-8/+0
flush_icache_range always does flush kernel address ranges, so no need to do the set_fs dance. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Reviewed-by: Christoph Hellwig <hch@lst.de>
2021-04-06MIPS: Add support for CONFIG_DEBUG_VIRTUALFlorian Fainelli6-4/+83
Provide hooks to intercept bad usages of virt_to_phys() and __pa_symbol() throughout the kernel. To make this possible, we need to rename the current implement of virt_to_phys() into __virt_to_phys_nodebug() and wrap it around depending on CONFIG_DEBUG_VIRTUAL. A similar thing is needed for __pa_symbol() which is now aliased to __phys_addr_symbol() whose implementation is either the direct return of RELOC_HIDE or goes through the debug version. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-04-06parisc: avoid a warning on u8 cast for cmpxchg on u8 pointersGao Xiang1-1/+1
commit b344d6a83d01 ("parisc: add support for cmpxchg on u8 pointers") can generate a sparse warning ("cast truncates bits from constant value"), which has been reported several times [1] [2] [3]. The original code worked as expected, but anyway, let silence such sparse warning as what others did [4]. [1] https://lore.kernel.org/r/202104061220.nRMBwCXw-lkp@intel.com [2] https://lore.kernel.org/r/202012291914.T5Agcn99-lkp@intel.com [3] https://lore.kernel.org/r/202008210829.KVwn7Xeh%25lkp@intel.com [4] https://lore.kernel.org/r/20210315131512.133720-2-jacopo+renesas@jmondi.org Cc: Liam Beguin <liambeguin@gmail.com> Cc: Helge Deller <deller@gmx.de> Cc: stable@vger.kernel.org # v5.8+ Signed-off-by: Gao Xiang <hsiangkao@redhat.com> Signed-off-by: Helge Deller <deller@gmx.de>
2021-04-06mips: bmips: bcm63268: populate device tree nodesÁlvaro Fernández Rojas1-14/+116
- Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add hsspi-osc clock. - Add watchdog. - Add HS SPI controller - Add NAND controller. - Add USBH PHY. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-04-06mips: bmips: bcm6368: populate device tree nodesÁlvaro Fernández Rojas1-11/+116
- Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add watchdog controller. - Add SPI controller. - Add NAND controller. - Add USBH PHY controller. - Add RNG controller. - Add cfi-flash controller. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-04-06mips: bmips: bcm6362: populate device tree nodesÁlvaro Fernández Rojas1-11/+116
- Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add hsspi-osc clock. - Add watchdog. - Add SPI controller. - Add HS SPI controller. - Add NAND controller. - Add USBH PHY. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-04-06mips: bmips: bcm6358: populate device tree nodesÁlvaro Fernández Rojas1-11/+72
- Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add watchdog. - Add SPI controller. - Add USBH PHY. - Add cfi-flash. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-04-06mips: bmips: bcm6328: populate device tree nodesÁlvaro Fernández Rojas1-14/+105
- Rename periph_clk to periph_osc. - Rename clkctl to periph_clk. - Move syscon-reboot to subnode. - Add hsspi-osc clock. - Add watchdog. - Add HS SPI controller. - Add NAND controller. - Add USBH PHY. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Reviewed-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-04-06mips: bmips: fix syscon-reboot nodesÁlvaro Fernández Rojas5-5/+5
Commit a23c4134955e added the clock controller nodes, incorrectly changing the syscon-reboot nodes addresses. Fixes: a23c4134955e ("MIPS: BMIPS: add clock controller nodes") Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Acked-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-04-06parisc: Remove duplicate struct task_struct declarationWan Jiabing1-1/+0
struct task_struct is declared twice. One has been declared at 154th line. Remove the duplicate. Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Signed-off-by: Helge Deller <deller@gmx.de>
2021-04-06x86/sgx: Add helper to update SGX_LEPUBKEYHASHn MSRsKai Huang3-3/+20
Add a helper to update SGX_LEPUBKEYHASHn MSRs. SGX virtualization also needs to update those MSRs based on guest's "virtual" SGX_LEPUBKEYHASHn before EINIT from guest. Signed-off-by: Kai Huang <kai.huang@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Dave Hansen <dave.hansen@intel.com> Acked-by: Jarkko Sakkinen <jarkko@kernel.org> Link: https://lkml.kernel.org/r/dfb7cd39d4dd62ea27703b64afdd8bccb579f623.1616136308.git.kai.huang@intel.com
2021-04-06x86/sgx: Add encls_faulted() helperSean Christopherson2-2/+15
Add a helper to extract the fault indicator from an encoded ENCLS return value. SGX virtualization will also need to detect ENCLS faults. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Kai Huang <kai.huang@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Jarkko Sakkinen <jarkko@kernel.org> Acked-by: Dave Hansen <dave.hansen@intel.com> Link: https://lkml.kernel.org/r/c1f955898110de2f669da536fc6cf62e003dff88.1616136308.git.kai.huang@intel.com
2021-04-06x86/sgx: Add SGX2 ENCLS leaf definitions (EAUG, EMODPR and EMODT)Sean Christopherson1-0/+3
Define the ENCLS leafs that are available with SGX2, also referred to as Enclave Dynamic Memory Management (EDMM). The leafs will be used by KVM to conditionally expose SGX2 capabilities to guests. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Kai Huang <kai.huang@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Jarkko Sakkinen <jarkko@kernel.org> Acked-by: Dave Hansen <dave.hansen@intel.com> Link: https://lkml.kernel.org/r/5f0970c251ebcc6d5add132f0d750cc753b7060f.1616136308.git.kai.huang@intel.com
2021-04-06x86/sgx: Move ENCLS leaf definitions to sgx.hSean Christopherson2-15/+15
Move the ENCLS leaf definitions to sgx.h so that they can be used by KVM. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Signed-off-by: Kai Huang <kai.huang@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Jarkko Sakkinen <jarkko@kernel.org> Acked-by: Dave Hansen <dave.hansen@intel.com> Link: https://lkml.kernel.org/r/2e6cd7c5c1ced620cfcd292c3c6c382827fde6b2.1616136308.git.kai.huang@intel.com
2021-04-06x86/sgx: Expose SGX architectural definitions to the kernelSean Christopherson3-7/+17
Expose SGX architectural structures, as KVM will use many of the architectural constants and structs to virtualize SGX. Name the new header file as asm/sgx.h, rather than asm/sgx_arch.h, to have single header to provide SGX facilities to share with other kernel componments. Also update MAINTAINERS to include asm/sgx.h. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Co-developed-by: Kai Huang <kai.huang@intel.com> Signed-off-by: Kai Huang <kai.huang@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Jarkko Sakkinen <jarkko@kernel.org> Acked-by: Dave Hansen <dave.hansen@intel.com> Link: https://lkml.kernel.org/r/6bf47acd91ab4d709e66ad1692c7803e4c9063a0.1616136308.git.kai.huang@intel.com
2021-04-06x86/sgx: Initialize virtual EPC driver even when SGX driver is disabledKai Huang1-1/+10
Modify sgx_init() to always try to initialize the virtual EPC driver, even if the SGX driver is disabled. The SGX driver might be disabled if SGX Launch Control is in locked mode, or not supported in the hardware at all. This allows (non-Linux) guests that support non-LC configurations to use SGX. [ bp: De-silli-fy the test. ] Signed-off-by: Kai Huang <kai.huang@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Reviewed-by: Sean Christopherson <seanjc@google.com> Acked-by: Jarkko Sakkinen <jarkko@kernel.org> Acked-by: Dave Hansen <dave.hansen@intel.com> Link: https://lkml.kernel.org/r/d35d17a02bbf8feef83a536cec8b43746d4ea557.1616136308.git.kai.huang@intel.com
2021-04-06x86/cpu/intel: Allow SGX virtualization without Launch Control supportSean Christopherson1-15/+44
The kernel will currently disable all SGX support if the hardware does not support launch control. Make it more permissive to allow SGX virtualization on systems without Launch Control support. This will allow KVM to expose SGX to guests that have less-strict requirements on the availability of flexible launch control. Improve error message to distinguish between three cases. There are two cases where SGX support is completely disabled: 1) SGX has been disabled completely by the BIOS 2) SGX LC is locked by the BIOS. Bare-metal support is disabled because of LC unavailability. SGX virtualization is unavailable (because of Kconfig). One where it is partially available: 3) SGX LC is locked by the BIOS. Bare-metal support is disabled because of LC unavailability. SGX virtualization is supported. Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Co-developed-by: Kai Huang <kai.huang@intel.com> Signed-off-by: Kai Huang <kai.huang@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Jarkko Sakkinen <jarkko@kernel.org> Acked-by: Dave Hansen <dave.hansen@intel.com> Link: https://lkml.kernel.org/r/b3329777076509b3b601550da288c8f3c406a865.1616136308.git.kai.huang@intel.com
2021-04-06x86/sgx: Introduce virtual EPC for use by KVM guestsSean Christopherson4-0/+281
Add a misc device /dev/sgx_vepc to allow userspace to allocate "raw" Enclave Page Cache (EPC) without an associated enclave. The intended and only known use case for raw EPC allocation is to expose EPC to a KVM guest, hence the 'vepc' moniker, virt.{c,h} files and X86_SGX_KVM Kconfig. The SGX driver uses the misc device /dev/sgx_enclave to support userspace in creating an enclave. Each file descriptor returned from opening /dev/sgx_enclave represents an enclave. Unlike the SGX driver, KVM doesn't control how the guest uses the EPC, therefore EPC allocated to a KVM guest is not associated with an enclave, and /dev/sgx_enclave is not suitable for allocating EPC for a KVM guest. Having separate device nodes for the SGX driver and KVM virtual EPC also allows separate permission control for running host SGX enclaves and KVM SGX guests. To use /dev/sgx_vepc to allocate a virtual EPC instance with particular size, the hypervisor opens /dev/sgx_vepc, and uses mmap() with the intended size to get an address range of virtual EPC. Then it may use the address range to create one KVM memory slot as virtual EPC for a guest. Implement the "raw" EPC allocation in the x86 core-SGX subsystem via /dev/sgx_vepc rather than in KVM. Doing so has two major advantages: - Does not require changes to KVM's uAPI, e.g. EPC gets handled as just another memory backend for guests. - EPC management is wholly contained in the SGX subsystem, e.g. SGX does not have to export any symbols, changes to reclaim flows don't need to be routed through KVM, SGX's dirty laundry doesn't have to get aired out for the world to see, and so on and so forth. The virtual EPC pages allocated to guests are currently not reclaimable. Reclaiming an EPC page used by enclave requires a special reclaim mechanism separate from normal page reclaim, and that mechanism is not supported for virutal EPC pages. Due to the complications of handling reclaim conflicts between guest and host, reclaiming virtual EPC pages is significantly more complex than basic support for SGX virtualization. [ bp: - Massage commit message and comments - use cpu_feature_enabled() - vertically align struct members init - massage Virtual EPC clarification text - move Kconfig prompt to Virtualization ] Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com> Co-developed-by: Kai Huang <kai.huang@intel.com> Signed-off-by: Kai Huang <kai.huang@intel.com> Signed-off-by: Borislav Petkov <bp@suse.de> Acked-by: Dave Hansen <dave.hansen@intel.com> Acked-by: Jarkko Sakkinen <jarkko@kernel.org> Link: https://lkml.kernel.org/r/0c38ced8c8e5a69872db4d6a1c0dabd01e07cad7.1616136308.git.kai.huang@intel.com
2021-04-06m68k: fpsp040,ifpsp060: Remove meaningless EXTRA_LDFLAGSMasahiro Yamada2-4/+0
These two Makefiles contain only built-in objects (i.e. obj-y), which are collected by $(AR) into a thin-archive. EXTRA_LDFLAGS is meaningless because $(LD) is not used here. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Link: https://lore.kernel.org/r/20210331144336.25628-2-masahiroy@kernel.org Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2021-04-06m68k: fpsp040: Remove meaningless $(OS_OBJS)Masahiro Yamada1-2/+0
'git grep OS_OBJS' hits only this line. $(OS_OBJS) is just empty. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Link: https://lore.kernel.org/r/20210331144336.25628-1-masahiroy@kernel.org Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2021-04-06m68k: mvme147,mvme16x: Don't wipe PCC timer config bitsFinn Thain3-12/+19
Don't clear the timer 1 configuration bits when clearing the interrupt flag and counter overflow. As Michael reported, "This results in no timer interrupts being delivered after the first. Initialization then hangs in calibrate_delay as the jiffies counter is not updated." On mvme16x, enable the timer after requesting the irq, consistent with mvme147. Cc: Michael Pavone <pavone@retrodev.com> Fixes: 7529b90d051e ("m68k: mvme147: Handle timer counter overflow") Fixes: 19999a8b8782 ("m68k: mvme16x: Handle timer counter overflow") Reported-and-tested-by: Michael Pavone <pavone@retrodev.com> Signed-off-by: Finn Thain <fthain@telegraphics.com.au> Link: https://lore.kernel.org/r/4fdaa113db089b8fb607f7dd818479f8cdcc4547.1617089871.git.fthain@telegraphics.com.au Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2021-04-06m68k: syscalls: switch to generic syscallhdr.shMasahiro Yamada2-41/+2
Many architectures duplicate similar shell scripts. This commit converts m68k to use scripts/syscallhdr.sh. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Link: https://lore.kernel.org/r/20210301142112.342909-2-masahiroy@kernel.org Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2021-04-06m68k: syscalls: switch to generic syscalltbl.shMasahiro Yamada3-39/+3
Many architectures duplicate similar shell scripts. This commit converts m68k to use scripts/syscalltbl.sh. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Link: https://lore.kernel.org/r/20210301142112.342909-1-masahiroy@kernel.org Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2021-04-06m68k: defconfig: Update defconfigs for v5.12-rc1Geert Uytterhoeven12-60/+0
- Drop CONFIG_CRYPTO_RMD128=m (removed in commit b21b9a5e0aef025a ("crypto: rmd128 - remove RIPE-MD 128 hash algorithm")), - Drop CONFIG_CRYPTO_RMD256=m (removed in commit c15d4167f0b0465b ("crypto: rmd256 - remove RIPE-MD 256 hash algorithm")), - Drop CONFIG_CRYPTO_RMD320=m (removed in commit 93f64202926f606d ("crypto: rmd320 - remove RIPE-MD 320 hash algorithm")), - Drop CONFIG_CRYPTO_TGR192=m (removed in commit 87cd723f8978c59b ("crypto: tgr192 - remove Tiger 128/160/192 hash algorithms")), - Drop CONFIG_CRYPTO_SALSA20=m (removed in commit 663f63ee6d9cdc68 ("crypto: salsa20 - remove Salsa20 stream cipher algorithm")). Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Link: https://lore.kernel.org/r/20210301093346.2679625-1-geert@linux-m68k.org
2021-04-06m68k: mm: Fix flatmem memory model setupAngelo Dureghello1-1/+1
Detected a broken boot on mcf54415, likely introduced from commit 4bfc848e0981 ("m68k/mm: enable use of generic memory_model.h for !DISCONTIGMEM") Fix ARCH_PFN_OFFSET to be a pfn. Signed-off-by: Angelo Dureghello <angelo@kernel-space.org> Acked-by: Mike Rapoport <rppt@linux.ibm.com> Link: https://lore.kernel.org/r/20210228190828.392974-1-angelo@kernel-space.org Fixes: 4bfc848e0981fcd3 ("m68k/mm: enable use of generic memory_model.h for !DISCONTIGMEM") Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org>
2021-04-06arm64: dts: qcom: sdm845-xiaomi-beryllium: Add DSI and panel bitsSumit Semwal1-0/+71
Enabling the Display panel for beryllium requires DSI labibb regulators and panel dts nodes to be added. It is also required to keep some of the regulators as always-on. Signed-off-by: Sumit Semwal <sumit.semwal@linaro.org> Signed-off-by: Amit Pundir <amit.pundir@linaro.org> Reviewed-by: Konrad Dybcio <konrad.dybcio@somainline.org> Link: https://lore.kernel.org/r/20210404194437.537011-1-amit.pundir@linaro.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-06arm64: dts: qcom: sc7280: Add Coresight supportSai Prakash Ranjan1-0/+489
Add coresight components found on SC7280 SoC. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Cc: Mike Leach <mike.leach@linaro.org> Cc: Leo Yan <leo.yan@linaro.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/de07324628f88900b72357f4ef7f0c7db7e3409d.1615832893.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-06arm64: dts: qcom: sc7280: Add AOSS QMP nodeSai Prakash Ranjan1-0/+14
Add a DT node for the AOSS QMP on SC7280 SoC. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Link: https://lore.kernel.org/r/12f013a09989dbc3075bfb204653dc02d54ae8a1.1615832893.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-06arm64: dts: qcom: sc7280: Add IPCC for SC7280 SoCSai Prakash Ranjan1-0/+10
Add the IPCC DT node which is used to send and receive IPC signals with remoteprocs for SC7280 SoC. Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Jassi Brar <jaswinder.singh@linaro.org> Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/8374f407386209d2e7891763de3fa2450a14ad60.1615832893.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-06arm64: dts: qcom: sc7280: Add device tree node for LLCCSai Prakash Ranjan1-0/+7
Add a DT node for Last level cache (aka. system cache) controller which provides control over the last level cache present on SC7280 SoC. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> Reviewed-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/5bacaa8350e0d9553dccd623a15513590e795b47.1615832893.git.saiprakash.ranjan@codeaurora.org Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-06arm64: dts: qcom: Add support for OnePlus 5/5TJami Kettunen4-0/+583
Add device trees for OnePlus 5 (cheeseburger) and 5T (dumpling) MSM8998 SoC smartphones with initial support included for: - UFS internal storage - USB peripheral mode - Display - Touch - Bluetooth - Hall effect sensor - Power and volume buttons - Capacitive keypad button backlight (on cheeseburger) Signed-off-by: Jami Kettunen <jamipkettunen@gmail.com> Link: https://lore.kernel.org/r/20210406010708.2376807-2-jamipkettunen@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-06arm64: dts: qcom: msm8998: Disable MSS remoteproc by defaultJami Kettunen3-0/+10
This was already the case for ADSP and SLPI remoteprocs & doesn't affect existing boards where it has been re-enabled. Signed-off-by: Jami Kettunen <jamipkettunen@gmail.com> Link: https://lore.kernel.org/r/20210406010708.2376807-3-jamipkettunen@gmail.com Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
2021-04-06arm64: dts: meson: add initial device-tree for MeCool KIII ProChristian Hewitt2-0/+114
MeCool (Videostrong) KIII Pro is based on the Amlogic Q200 reference board with an S912 chip and the following specs: - 3GB DDR3 RAM - 16GB eMMC - 10/100/1000 Base-T Ethernet - BCM4335 Wireless (802.11 b/g/n/ac, BT 4.0) - DVB-C/T/T2/S/S2 (AVL6862TA demod + R912 tuner) - HDMI 2.0a video - S/PDIF optical output - CVBS/Analogue output - 4x USB 2.0 ports - IR receiver - 1x Power button (with integrated blue LED) - 1x Update/Reset button (underside) - 1x micro SD card slot Tested-by: Drazen Spio <drazsp@gmail.com> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20210402064521.30579-4-christianshewitt@gmail.com
2021-04-06arm64: dts: meson: add initial device-tree for MeCool KII ProChristian Hewitt2-0/+87
MeCool (Videostrong) KII Pro is based on the Amlogic P230 reference board with an S905D chip and the following specs: - 2GB DDR3 RAM - 16GB eMMC - 10/100 Base-T Ethernet - BCM4335 Wireless (802.11 b/g/n/ac, BT 4.0) - DVB-C/T/T2/S/S2 (AVL6862TA demod + R848 tuner) - HDMI 2.0a video - S/PDIF optical output - CVBS/Analogue output - 4x USB 2.0 ports - IR receiver - 1x Power button (with integrated blue LED) - 1x micro SD card slot Tested-by: Drazen Spio <drazsp@gmail.com> Signed-off-by: Christian Hewitt <christianshewitt@gmail.com> Reviewed-by: Neil Armstrong <narmstrong@baylibre.com> Signed-off-by: Kevin Hilman <khilman@baylibre.com> Link: https://lore.kernel.org/r/20210402064521.30579-3-christianshewitt@gmail.com
2021-04-05arm64: Add TRBE definitionsAnshuman Khandual1-0/+50
This adds TRBE related registers and corresponding feature macros. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Suzuki K Poulose <suzuki.poulose@arm.com> Reviewed-by: Mike Leach <mike.leach@linaro.org> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20210405164307.1720226-5-suzuki.poulose@arm.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2021-04-05arm64: Add support for trace synchronization barrierSuzuki K Poulose1-0/+1
tsb csync synchronizes the trace operation of instructions. The instruction is a nop when FEAT_TRF is not implemented. Cc: Mathieu Poirier <mathieu.poirier@linaro.org> Cc: Mike Leach <mike.leach@linaro.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: Will Deacon <will.deacon@arm.com> Acked-by: Catalin Marinas <catalin.marinas@arm.com> Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com> Link: https://lore.kernel.org/r/20210405164307.1720226-4-suzuki.poulose@arm.com Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
2021-04-05s390/mm: fix phys vs virt confusion in mark_kernel_pXd() functions familyAlexander Gordeev1-4/+4
Due to historical reasons mark_kernel_pXd() functions misuse the notion of physical vs virtual addresses difference. Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2021-04-05s390/cio: remove duplicate struct ccw1 declarationWan Jiabing1-3/+0
struct ccw1 is declared twice. One has been declared at 21st line. Remove the duplicate. Signed-off-by: Wan Jiabing <wanjiabing@vivo.com> Acked-by: Vineeth Vijayan <vneethv@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2021-04-05s390/pci: expose UID uniqueness guaranteeNiklas Schnelle1-0/+9
On s390 each PCI device has a user-defined ID (UID) exposed under /sys/bus/pci/devices/<dev>/uid. This ID was designed to serve as the PCI device's primary index and to match the device within Linux to the device configured in the hypervisor. To serve as a primary identifier the UID must be unique within the Linux instance, this is guaranteed by the platform if and only if the UID Uniqueness Checking flag is set within the CLP List PCI Functions response. While the UID has been exposed to userspace since commit ac4995b9d570 ("s390/pci: add some new arch specific pci attributes") whether or not the platform guarantees its uniqueness for the lifetime of the Linux instance while defined is not visible from userspace. Remedy this by exposing this as a per device attribute at /sys/bus/pci/devices/<dev>/uid_is_unique Keeping this a per device attribute allows for maximum flexibility if we ever end up with some devices not having a UID or not enjoying the guaranteed uniqueness. Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com> Reviewed-by: Viktor Mihajlovski <mihajlov@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2021-04-05s390/irq: fix reading of ext_params2 field from lowcoreHeiko Carstens1-1/+1
The contents of the ext_params2 field of the lowcore should just be copied to the pt_regs structure, not dereferenced. Fixes crashes / program check loops like this: Krnl PSW : 0404c00180000000 00000000d6d02b3c (do_ext_irq+0x74/0x170) R:0 T:1 IO:0 EX:0 Key:0 M:1 W:0 P:0 AS:3 CC:0 PM:0 RI:0 EA:3 Krnl GPRS: 0000000000000000 80000000000b974e 00000000d71abee0 00000000d71abee0 0000000080030000 000000000000000f 0000000000000000 0000000000000000 0000000000000001 00000380000bf918 00000000d73ef780 00000380000bf518 0000000080348000 00000000d6d13350 00000000d6d02b1e 00000380000bf428 Krnl Code: 00000000d6d02b2e: 58100080 l %r1,128 00000000d6d02b32: 5010b0a4 st %r1,164(%r11) #00000000d6d02b36: e31001b80104 lg %r1,4536 >00000000d6d02b3c: e31010000004 lg %r1,0(%r1) 00000000d6d02b42: e310b0a80024 stg %r1,168(%r11) 00000000d6d02b48: c01000242270 larl %r1,00000000d7187028 00000000d6d02b4e: d5071000b010 clc 0(8,%r1),16(%r11) 00000000d6d02b54: a784001b brc 8,00000000d6d02b8a Call Trace: [<00000000d6d02b3c>] do_ext_irq+0x74/0x170 [<00000000d6d0ea5c>] ext_int_handler+0xc4/0xf4 [<00000000d621d266>] die+0x106/0x188 [<00000000d62305b8>] do_no_context+0xc8/0x100 [<00000000d6d02790>] __do_pgm_check+0xe0/0x1f0 [<00000000d6d0e950>] pgm_check_handler+0x118/0x160 [<00000000d6d02b3c>] do_ext_irq+0x74/0x170 [<00000000d6d0ea5c>] ext_int_handler+0xc4/0xf4 [<00000000d621d266>] die+0x106/0x188 [<00000000d62305b8>] do_no_context+0xc8/0x100 [<00000000d6d02790>] __do_pgm_check+0xe0/0x1f0 [<00000000d6d0e950>] pgm_check_handler+0x118/0x160 [<00000000d6d02b3c>] do_ext_irq+0x74/0x170 [<00000000d6d0ea5c>] ext_int_handler+0xc4/0xf4 [<0000000000000000>] 0x0 [<00000000d6d0e57a>] default_idle_call+0x42/0x110 [<00000000d629856e>] do_idle+0xce/0x160 [<00000000d62987be>] cpu_startup_entry+0x36/0x40 [<00000000d621f2f2>] smp_start_secondary+0x82/0x88 Cc: Sven Schnelle <svens@linux.ibm.com> Cc: Vasily Gorbik <gor@linux.ibm.com> Fixes: 56e62a737028 ("s390: convert to generic entry") Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2021-04-05s390/unwind: add machine check handler stackVasily Gorbik2-1/+12
Fixes: b61b1595124a ("s390: add stack for machine check handler") Signed-off-by: Vasily Gorbik <gor@linux.ibm.com> Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2021-04-05s390/cpcmd: fix inline assembly register clobberingAlexander Gordeev1-2/+4
Register variables initialized using arithmetic. That leads to kasan instrumentaton code corrupting the registers contents. Follow GCC guidlines and use temporary variables for assigning init values to register variables. Fixes: 94c12cc7d196 ("[S390] Inline assembly cleanup.") Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com> Acked-by: Ilya Leoshkevich <iii@linux.ibm.com> Link: https://gcc.gnu.org/onlinedocs/gcc-10.2.0/gcc/Local-Register-Variables.html Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
2021-04-05Merge 5.12-rc6 into tty-nextGreg Kroah-Hartman107-448/+827
We need the serial/tty fixes in here as well. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-04-05Merge 5.12-rc6 into usb-nextGreg Kroah-Hartman67-258/+463
We want the USB fixes in here as well and it resolves a merge issue with xhci-mtk.c Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2021-04-05xtensa: ISS: add GDBIO implementation to semihosting interfaceMax Filippov3-0/+92
Add GDBIO implementation for the xtensa semihosting interface. It offers less functions than the simcall interface, so make some semihosting functions optional and return error when implementation is not available. Add Kconfig menu to select semihosting implementation and add simcall and GDBIO choices there. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2021-04-05xtensa: ISS: split simcall implementation from semihosting interfaceMax Filippov2-68/+75
Disconnect existing ISS simcall implementation from the semihosting interface to allow for alternative implementations selectable at configure time. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2021-04-05xtensa: simcall.h: Change compitible to compatibleBhaskar Chowdhury1-1/+1
s/compitible/compatible/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Message-Id: <20210326012739.18038-1-unixbhaskar@gmail.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2021-04-05xtensa: Couple of typo fixesBhaskar Chowdhury1-2/+2
s/contans/contains/ s/desination/destination/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Message-Id: <20210325040832.26018-1-unixbhaskar@gmail.com> Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2021-04-05xtensa: drop extraneous register load from initialize_mmuMax Filippov1-1/+1
Commit a9f2fc628e3a ("xtensa: cleanup MMU setup and kernel layout macros") removed the use of a2 in the beginning of the initialize_mmu macro, but left the register load that is no longer used. Remove it as well. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
2021-04-05xtensa: fix pgprot_noncached assumptionsMax Filippov1-1/+3
pgprot_noncached assumes that cache bypass attribute is represented as zero. This may not always be true. Fix pgprot_noncached definition by adding _PAGE_CA_BYPASS to the result. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
generated by cgit v1.2.3 (git 2.39.0) at 2025-09-13 13:54:10 +0300