| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2015-06-23 | Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ke... | Linus Torvalds | 1 | -0/+4 |
| 2015-06-19 | perf/x86/intel/bts: Fix DS area sharing with x86_pmu events | Alexander Shishkin | 1 | -0/+4 |
| 2015-06-07 | perf/x86/intel: Drain the PEBS buffer during context switches | Yan, Zheng | 1 | -1/+5 |
| 2015-06-07 | perf/x86/intel: Implement batched PEBS interrupt handling (large PEBS interru... | Yan, Zheng | 1 | -0/+11 |
| 2015-06-07 | perf/x86/intel: Use the PEBS auto reload mechanism when possible | Yan, Zheng | 1 | -0/+1 |
| 2015-05-27 | perf/x86/intel: Remove intel_excl_states::init_state | Peter Zijlstra | 1 | -1/+0 |
| 2015-05-27 | perf/x86/intel: Clean up intel_commit_scheduling() placement | Peter Zijlstra | 1 | -2/+2 |
| 2015-05-27 | perf/x86: Improve HT workaround GP counter constraint | Peter Zijlstra | 1 | -3/+12 |
| 2015-05-27 | perf/x86: Fix event/group validation | Peter Zijlstra | 1 | -4/+5 |
| 2015-04-17 | perf/x86: Fix hw_perf_event::flags collision | Peter Zijlstra | 1 | -9/+9 |
| 2015-04-02 | perf/x86/intel: Streamline LBR MSR handling in PMI | Andi Kleen | 1 | -1/+1 |
| 2015-04-02 | perf/x86/intel: Make the HT bug workaround conditional on HT enabled | Stephane Eranian | 1 | -0/+5 |
| 2015-04-02 | perf/x86/intel: Limit to half counters when the HT workaround is enabled, to ... | Stephane Eranian | 1 | -0/+2 |
| 2015-04-02 | perf/x86/intel: Enforce HT bug workaround with PEBS for SNB/IVB/HSW | Maria Dimakopoulou | 1 | -1/+19 |
| 2015-04-02 | perf/x86/intel: Implement cross-HT corruption bug workaround | Maria Dimakopoulou | 1 | -0/+6 |
| 2015-04-02 | perf/x86/intel: Add cross-HT counter exclusion infrastructure | Maria Dimakopoulou | 1 | -0/+32 |
| 2015-04-02 | perf/x86: Add 'index' param to get_event_constraint() callback | Stephane Eranian | 1 | -1/+3 |
| 2015-04-02 | perf/x86: Add 3 new scheduling callbacks | Maria Dimakopoulou | 1 | -0/+9 |
| 2015-04-02 | perf/x86: Vectorize cpuc->kfree_on_online | Stephane Eranian | 1 | -1/+7 |
| 2015-04-02 | perf/x86: Rename x86_pmu::er_flags to 'flags' | Stephane Eranian | 1 | -3/+6 |
| 2015-04-02 | perf/x86/intel/bts: Add BTS PMU driver | Alexander Shishkin | 1 | -0/+7 |
| 2015-04-02 | perf/x86/intel/pt: Add Intel PT PMU driver | Alexander Shishkin | 1 | -0/+2 |
| 2015-04-02 | perf/x86: Mark Intel PT and LBR/BTS as mutually exclusive | Alexander Shishkin | 1 | -0/+40 |
| 2015-03-27 | perf/x86/intel: Add INST_RETIRED.ALL workarounds | Andi Kleen | 1 | -0/+1 |
| 2015-02-18 | perf/x86/intel: Expose LBR callstack to user space tooling | Peter Zijlstra | 1 | -8/+0 |
| 2015-02-18 | perf/x86/intel: Allocate space for storing LBR stack | Yan, Zheng | 1 | -0/+7 |
| 2015-02-18 | perf/x86/intel: Add basic Haswell LBR call stack support | Yan, Zheng | 1 | -1/+13 |
| 2015-02-18 | perf/x86/intel: Use context switch callback to flush LBR stack | Yan, Zheng | 1 | -1/+2 |
| 2015-02-18 | perf: Introduce pmu context switch callback | Yan, Zheng | 1 | -0/+2 |
| 2015-02-18 | perf/x86/intel: Reduce lbr_sel_map[] size | Yan, Zheng | 1 | -0/+4 |
| 2015-02-04 | perf/x86: Only allow rdpmc if a perf_event is mapped | Andy Lutomirski | 1 | -0/+2 |
| 2014-11-16 | perf/x86: Add INTEL_FLAGS_UEVENT_CONSTRAINT | Andi Kleen | 1 | -0/+4 |
| 2014-10-29 | perf/x86/intel: Revert incomplete and undocumented Broadwell client support | Ingo Molnar | 1 | -1/+0 |
| 2014-09-24 | perf/x86: Add INST_RETIRED.ALL workarounds | Andi Kleen | 1 | -0/+1 |
| 2014-08-13 | perf/x86: Revamp PEBS event selection | Andi Kleen | 1 | -6/+42 |
| 2014-07-16 | perf/x86/intel: Protect LBR and extra_regs against KVM lying | Kan Liang | 1 | -5/+7 |
| 2014-02-27 | perf/x86: Add a few more comments | Peter Zijlstra | 1 | -3/+5 |
| 2014-02-09 | perf/x86/intel/p6: Add userspace RDPMC quirk for PPro | Peter Zijlstra | 1 | -0/+1 |
| 2013-12-05 | perf/x86: Fix constraint table end marker bug | Maria Dimakopoulou | 1 | -3/+12 |
| 2013-10-04 | perf/x86: Suppress duplicated abort LBR records | Andi Kleen | 1 | -0/+1 |
| 2013-09-12 | perf/x86/intel: Clean up checkpoint-interrupt bits | Peter Zijlstra | 1 | -0/+5 |
| 2013-09-02 | perf/x86: Add Silvermont (22nm Atom) support | Yan, Zheng | 1 | -0/+2 |
| 2013-06-26 | perf/x86: Fix shared register mutual exclusion enforcement | Stephane Eranian | 1 | -1/+2 |
| 2013-06-26 | perf/x86/intel: Support full width counting | Andi Kleen | 1 | -0/+5 |
| 2013-06-19 | perf/x86/intel: Add mem-loads/stores support for Haswell | Andi Kleen | 1 | -0/+6 |
| 2013-06-19 | perf/x86/intel: Move NMI clearing to end of PMI handler | Andi Kleen | 1 | -0/+1 |
| 2013-06-19 | perf/x86/intel: Add Haswell PEBS support | Andi Kleen | 1 | -0/+2 |
| 2013-06-19 | perf/x86/intel: Add simple Haswell PMU support | Andi Kleen | 1 | -1/+4 |
| 2013-06-19 | perf/x86: Reduce stack usage of x86_schedule_events() | Andrew Hunter | 1 | -1/+1 |
| 2013-04-01 | perf/x86: Add support for PEBS Precise Store | Stephane Eranian | 1 | -0/+5 |
