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path: root/arch/x86/kernel/apic
AgeCommit message (Expand)AuthorFilesLines
2020-10-28x86/apic/uv: Fix inconsistent destination modeThomas Gleixner1-1/+1
2020-10-28x86/msi: Only use high bits of MSI address for DMAR unitDavid Woodhouse1-6/+27
2020-10-28x86/apic: Fix x2apic enablement without interrupt remappingDavid Woodhouse2-6/+17
2020-10-12Merge tag 'x86-irq-2020-10-12' of git://git.kernel.org/pub/scm/linux/kernel/g...Linus Torvalds6-127/+77
2020-10-07x86/platform/uv: Update Copyrights to conform to HPE standardsMike Travis1-0/+1
2020-10-07x86/platform/uv: Update UV5 TSC checkingMike Travis1-14/+10
2020-10-07x86/platform/uv: Update node present countingMike Travis1-7/+19
2020-10-07x86/platform/uv: Update UV5 MMR references in UV GRUMike Travis1-6/+24
2020-10-07x86/platform/uv: Adjust GAM MMR references affected by UV5 updatesMike Travis1-5/+25
2020-10-07x86/platform/uv: Update MMIOH references based on new UV5 MMRsMike Travis1-68/+144
2020-10-07x86/platform/uv: Add and decode Arch Type in UVsystabMike Travis1-19/+116
2020-10-07x86/platform/uv: Add UV5 direct referencesMike Travis1-27/+70
2020-10-07x86/platform/uv: Update UV MMRs for UV5Mike Travis1-112/+155
2020-10-07x86/platform/uv: Remove SCIR MMR references for UV systemsMike Travis1-82/+0
2020-09-27x86/apic/msi: Unbreak DMAR and HPET MSIThomas Gleixner1-0/+2
2020-09-23x86/ioapic: Unbreak check_timer()Thomas Gleixner1-0/+1
2020-09-16x86/irq: Cleanup the arch_*_msi_irqs() leftoversThomas Gleixner1-22/+0
2020-09-16x86/pci: Set default irq domain in pcibios_add_device()Thomas Gleixner1-1/+1
2020-09-16x86/irq: Initialize PCI/MSI domain at PCI init timeThomas Gleixner2-14/+19
2020-09-16x86/irq: Move apic_post_init() invocation to one placeThomas Gleixner3-6/+3
2020-09-16x86/msi: Use generic MSI domain opsThomas Gleixner1-29/+1
2020-09-16x86/msi: Consolidate MSI allocationThomas Gleixner1-4/+3
2020-09-16PCI/MSI: Rework pci_msi_domain_calc_hwirq()Thomas Gleixner1-1/+1
2020-09-16x86/irq: Consolidate DMAR irq allocationThomas Gleixner1-5/+5
2020-09-16x86_ioapic_Consolidate_IOAPIC_allocationThomas Gleixner1-35/+35
2020-09-16x86/msi: Consolidate HPET allocationThomas Gleixner1-7/+7
2020-09-16iommu/irq_remapping: Consolidate irq domain lookupThomas Gleixner2-2/+2
2020-09-16x86/irq: Add allocation type for parent domain retrievalThomas Gleixner2-2/+2
2020-09-16x86_irq_Rename_X86_IRQ_ALLOC_TYPE_MSI_to_reflect_PCI_dependencyThomas Gleixner1-3/+3
2020-09-16x86/msi: Remove pointless vcpu_affinity callbackThomas Gleixner1-1/+0
2020-09-16x86/msi: Move compose message callback where it belongsThomas Gleixner2-9/+4
2020-09-16genirq/chip: Use the first chip in irq_chip_compose_msi_msg()Thomas Gleixner1-2/+5
2020-08-30Merge tag 'x86-urgent-2020-08-30' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds1-7/+9
2020-08-27x86/irq: Unbreak interrupt affinity settingThomas Gleixner1-7/+9
2020-08-24treewide: Use fallthrough pseudo-keywordGustavo A. R. Silva2-3/+3
2020-08-11Merge tag 'locking-urgent-2020-08-10' of git://git.kernel.org/pub/scm/linux/k...Linus Torvalds8-0/+8
2020-08-07mm: remove unneeded includes of <asm/pgalloc.h>Mike Rapoport1-1/+0
2020-08-06locking/seqlock, headers: Untangle the spaghetti monsterPeter Zijlstra3-0/+3
2020-08-06x86/headers: Remove APIC headers from <asm/smp.h>Ingo Molnar5-0/+5
2020-08-04Merge tag 'x86-platform-2020-08-03' of git://git.kernel.org/pub/scm/linux/ker...Linus Torvalds1-96/+26
2020-07-27genirq/affinity: Make affinity setting if activated opt-inThomas Gleixner1-0/+4
2020-07-23irqdomain/treewide: Free firmware node after domain removalJon Derrick1-0/+5
2020-07-18genirq/affinity: Handle affinity setting on inactive interrupts correctlyThomas Gleixner1-17/+5
2020-07-17x86/platform/uv: Remove support for UV1 platform from x2apic_uv_xsteve.wahl@hpe.com1-96/+26
2020-07-14irqdomain/treewide: Keep firmware node unconditionally allocatedThomas Gleixner3-12/+17
2020-06-13Merge tag 'x86-entry-2020-06-12' of git://git.kernel.org/pub/scm/linux/kernel...Linus Torvalds3-24/+23
2020-06-12Merge tag 'x86-urgent-2020-06-11' of git://git.kernel.org/pub/scm/linux/kerne...Linus Torvalds1-1/+1
2020-06-11x86/entry: Convert SMP system vectors to IDTENTRY_SYSVECThomas Gleixner1-3/+2
2020-06-11x86/entry: Convert APIC interrupts to IDTENTRY_SYSVECThomas Gleixner1-18/+5
2020-06-11x86/entry: Use idtentry for interruptsThomas Gleixner2-16/+10
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