index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
x86
/
events
/
perf_event.h
Age
Commit message (
Expand
)
Author
Files
Lines
2019-05-10
perf/x86/intel: Fix INTEL_FLAGS_EVENT_CONSTRAINT* masking
Stephane Eranian
1
-2
/
+2
2019-04-16
perf/x86/intel: Add Icelake support
Kan Liang
1
-0
/
+2
2019-04-16
perf/x86: Support constraint ranges
Peter Zijlstra
1
-6
/
+37
2019-04-16
perf/x86/lbr: Avoid reading the LBRs when adaptive PEBS handles them
Andi Kleen
1
-0
/
+1
2019-04-16
perf/x86/intel: Support adaptive PEBS v4
Kan Liang
1
-1
/
+10
2019-04-16
perf/x86: Support outputting XMM registers
Kan Liang
1
-1
/
+20
2019-04-16
perf/x86/intel: Force resched when TFA sysctl is modified
Stephane Eranian
1
-0
/
+1
2019-04-16
Merge branch 'perf/urgent' into perf/core, to pick up fixes
Ingo Molnar
1
-19
/
+19
2019-04-16
perf/x86: Fix incorrect PEBS_REGS
Kan Liang
1
-19
/
+19
2019-04-03
perf/x86: Remove PERF_X86_EVENT_COMMITTED
Peter Zijlstra
1
-10
/
+9
2019-03-15
perf/x86: Fixup typo in stub functions
Peter Zijlstra
1
-2
/
+2
2019-03-12
Merge branch 'x86-tsx-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
Linus Torvalds
1
-3
/
+14
2019-03-06
perf/x86/intel: Implement support for TSX Force Abort
Peter Zijlstra (Intel)
1
-0
/
+6
2019-03-06
perf/x86/intel: Make cpuc allocations consistent
Peter Zijlstra (Intel)
1
-3
/
+8
2019-02-28
Merge branch 'linus' into perf/core, to pick up fixes
Ingo Molnar
1
-2
/
+14
2019-02-11
perf/x86: Add check_period PMU callback
Jiri Olsa
1
-2
/
+14
2019-02-11
perf/x86/kvm: Avoid unnecessary work in guest filtering
Andi Kleen
1
-7
/
+8
2018-11-22
perf/x86/intel: Add generic branch tracing check to intel_pmu_has_bts()
Jiri Olsa
1
-4
/
+9
2018-10-02
perf/x86/intel: Add a separate Arch Perfmon v4 PMI handler
Andi Kleen
1
-1
/
+3
2018-07-25
perf/x86/intel: Introduce PMU flag for Extended PEBS
Kan Liang
1
-0
/
+1
2018-06-21
perf/x86/intel/lbr: Optimize context switches for the LBR call stack
Kan Liang
1
-0
/
+4
2018-06-21
perf/x86/intel/lbr: Fix incomplete LBR call stack
Kan Liang
1
-0
/
+1
2018-03-24
Merge branch 'perf/urgent' into perf/core, to pick up fixes
Ingo Molnar
1
-3
/
+3
2018-03-20
perf/x86/intel: Rename confusing 'freerunning PEBS' API and implementation to...
Kan Liang
1
-3
/
+3
2018-03-09
perf/x86/intel/ds: Introduce ->read() function for auto-reload events and flu...
Kan Liang
1
-0
/
+2
2018-03-09
perf/x86: Introduce a ->read() callback in 'struct x86_pmu'
Kan Liang
1
-0
/
+1
2018-03-09
perf/x86/intel: Fix large period handling on Broadwell CPUs
Kan Liang
1
-1
/
+1
2018-02-05
x86/events/intel/ds: Add PERF_SAMPLE_PERIOD into PEBS_FREERUNNING_FLAGS
Jiri Olsa
1
-1
/
+2
2017-12-23
x86/events/intel/ds: Map debug buffers in cpu_entry_area
Hugh Dickins
1
-0
/
+2
2017-12-23
x86/cpu_entry_area: Add debugstore entries to cpu_entry_area
Thomas Gleixner
1
-19
/
+2
2017-12-17
perf/x86: Enable free running PEBS for REGS_USER/INTR
Andi Kleen
1
-1
/
+23
2017-08-29
perf/core, x86: Add PERF_SAMPLE_PHYS_ADDR
Kan Liang
1
-1
/
+1
2017-08-25
perf/x86: Export some PMU attributes in caps/ directory
Andi Kleen
1
-0
/
+3
2017-08-25
perf/x86: Fix data source decoding for Skylake
Andi Kleen
1
-0
/
+2
2017-08-25
perf/x86: Move Nehalem PEBS code to flag
Andi Kleen
1
-1
/
+2
2017-07-18
perf/x86/intel: Add Goldmont Plus CPU PMU support
Kan Liang
1
-0
/
+2
2017-05-23
perf/x86: Add sysfs entry to freeze counters on SMI
Kan Liang
1
-0
/
+3
2017-04-14
perf/x86: Fix spurious NMI with PEBS Load Latency event
Kan Liang
1
-0
/
+1
2016-12-11
perf/x86: Fix exclusion of BTS and LBR for Goldmont
Andi Kleen
1
-1
/
+1
2016-11-22
perf/x86/intel: Cure bogus unwind from PEBS entries
Peter Zijlstra
1
-1
/
+1
2016-08-10
perf/x86/intel: Clean up LBR state tracking
Peter Zijlstra
1
-1
/
+0
2016-08-10
perf/x86: Ensure perf_sched_cb_{inc,dec}() is only called from pmu::{add,del}()
Peter Zijlstra
1
-2
/
+8
2016-08-10
perf/x86/intel: Rework the large PEBS setup code
Peter Zijlstra
1
-0
/
+2
2016-06-27
perf/x86/intel: Fix MSR_LAST_BRANCH_FROM_x bug when no TSX
David Carrillo-Cisneros
1
-0
/
+2
2016-06-03
perf/x86: Support sysfs files depending on SMT status
Andi Kleen
1
-0
/
+10
2016-05-05
perf/x86/intel/pt: Bypass PT vs. LBR exclusivity if the core supports it
Alexander Shishkin
1
-0
/
+1
2016-04-23
perf/x86/intel: Add LBR filter support for Silvermont and Airmont CPUs
Kan Liang
1
-0
/
+2
2016-04-23
perf/x86/intel: Add Goldmont CPU support
Kan Liang
1
-0
/
+2
2016-04-03
Merge branch 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/ke...
Linus Torvalds
1
-3
/
+3
2016-03-29
perf/x86/amd: Cleanup Fam10h NB event constraints
Peter Zijlstra
1
-0
/
+5
[next]