Age | Commit message (Expand) | Author | Files | Lines |
2020-07-08 | perf/x86/intel/lbr: Unify the stored format of LBR information | Kan Liang | 1 | -3/+3 |
2020-02-11 | perf/x86/intel: Fix inaccurate period in context switch for auto-reload | Kan Liang | 1 | -0/+2 |
2019-12-10 | perf/x86/intel: Explicitly include asm/io.h to use virt_to_phys() | Sean Christopherson | 1 | -0/+1 |
2019-08-28 | perf/x86/intel: Support PEBS output to PT | Alexander Shishkin | 1 | -1/+50 |
2019-07-25 | perf/x86/intel: Fix SLOTS PEBS event constraint | Kan Liang | 1 | -1/+1 |
2019-07-09 | Merge branch 'x86-paravirt-for-linus' of git://git.kernel.org/pub/scm/linux/k... | Linus Torvalds | 1 | -4/+4 |
2019-06-24 | perf/x86: Remove pmu->pebs_no_xmm_regs | Kan Liang | 1 | -4/+2 |
2019-06-24 | perf/x86: Clean up PEBS_XMM_REGS | Kan Liang | 1 | -1/+1 |
2019-06-24 | perf/x86: Disable extended registers for non-supported PMUs | Kan Liang | 1 | -0/+1 |
2019-05-21 | perf/x86/intel/ds: Fix EVENT vs. UEVENT PEBS constraints | Stephane Eranian | 1 | -14/+14 |
2019-04-29 | x86/paravirt: Standardize 'insn_buff' variable names | Ingo Molnar | 1 | -4/+4 |
2019-04-16 | perf/x86/intel: Add Icelake support | Kan Liang | 1 | -2/+23 |
2019-04-16 | perf/x86: Support constraint ranges | Peter Zijlstra | 1 | -1/+1 |
2019-04-16 | perf/x86/intel: Support adaptive PEBS v4 | Kan Liang | 1 | -25/+355 |
2019-04-16 | perf/x86/intel/ds: Extract code of event update in short period | Kan Liang | 1 | -13/+20 |
2019-04-16 | perf/x86/intel: Extract memory code PEBS parser for reuse | Andi Kleen | 1 | -29/+34 |
2019-04-16 | perf/x86: Support outputting XMM registers | Kan Liang | 1 | -1/+3 |
2019-02-11 | perf/x86/kvm: Avoid unnecessary work in guest filtering | Andi Kleen | 1 | -0/+2 |
2018-12-03 | x86: Fix various typos in comments | Ingo Molnar | 1 | -1/+1 |
2018-07-25 | perf/x86/intel: Support Extended PEBS for Goldmont Plus | Kan Liang | 1 | -6/+0 |
2018-07-25 | perf/x86/intel/ds: Handle PEBS overflow for fixed counters | Kan Liang | 1 | -9/+27 |
2018-07-25 | perf/x86/intel: Introduce PMU flag for Extended PEBS | Kan Liang | 1 | -0/+7 |
2018-07-25 | perf/x86/intel: Fix unwind errors from PEBS entries (mk-II) | Peter Zijlstra | 1 | -14/+11 |
2018-07-15 | x86/events/intel/ds: Fix bts_interrupt_threshold alignment | Hugh Dickins | 1 | -3/+5 |
2018-04-05 | perf/x86/intel: Move regs->flags EXACT bit init | Stephane Eranian | 1 | -10/+24 |
2018-03-29 | Merge branch 'perf/urgent' into perf/core | Ingo Molnar | 1 | -8/+17 |
2018-03-27 | perf/x86/intel: Fix linear IP of PEBS real_ip on Haswell and later CPUs | Stephane Eranian | 1 | -8/+17 |
2018-03-24 | Merge branch 'perf/urgent' into perf/core, to pick up fixes | Ingo Molnar | 1 | -3/+3 |
2018-03-20 | perf/x86/intel: Rename confusing 'freerunning PEBS' API and implementation to... | Kan Liang | 1 | -3/+3 |
2018-03-09 | perf/x86/intel/ds: Introduce ->read() function for auto-reload events and flu... | Kan Liang | 1 | -0/+9 |
2018-03-09 | perf/x86/intel: Fix event update for auto-reload | Kan Liang | 1 | -4/+88 |
2018-01-25 | perf/x86: Fix perf,x86,cpuhp deadlock | Peter Zijlstra | 1 | -15/+18 |
2018-01-05 | x86/events/intel/ds: Use the proper cache flush method for mapping ds buffers | Peter Zijlstra | 1 | -0/+16 |
2017-12-23 | x86/events/intel/ds: Map debug buffers in cpu_entry_area | Hugh Dickins | 1 | -45/+80 |
2017-12-23 | x86/cpu_entry_area: Add debugstore entries to cpu_entry_area | Thomas Gleixner | 1 | -2/+3 |
2017-11-02 | License cleanup: add SPDX GPL-2.0 license identifier to files with no license | Greg Kroah-Hartman | 1 | -0/+1 |
2017-08-29 | perf/core, x86: Add PERF_SAMPLE_PHYS_ADDR | Kan Liang | 1 | -1/+1 |
2017-08-25 | perf/x86: Fix data source decoding for Skylake | Andi Kleen | 1 | -19/+32 |
2017-08-25 | perf/x86: Move Nehalem PEBS code to flag | Andi Kleen | 1 | -4/+1 |
2017-07-21 | perf/x86/intel: Add proper condition to run sched_task callbacks | Jiri Olsa | 1 | -6/+8 |
2017-07-18 | perf/x86/intel: Fix debug_store reset field for freq events | Jiri Olsa | 1 | -0/+2 |
2017-07-18 | perf/x86/intel: Add Goldmont Plus CPU PMU support | Kan Liang | 1 | -0/+6 |
2017-04-14 | perf/x86: Fix spurious NMI with PEBS Load Latency event | Kan Liang | 1 | -1/+1 |
2017-01-14 | perf/x86/intel: Account interrupts for PEBS errors | Jiri Olsa | 1 | -1/+5 |
2016-11-22 | perf/x86/intel: Cure bogus unwind from PEBS entries | Peter Zijlstra | 1 | -12/+23 |
2016-09-10 | Merge branch 'perf/urgent' into perf/core, to pick up fixes | Ingo Molnar | 1 | -8/+11 |
2016-09-10 | perf/x86/intel: Fix PEBSv3 record drain | Peter Zijlstra | 1 | -8/+11 |
2016-08-18 | perf/x86: Fix PEBS threshold initialization | Jiri Olsa | 1 | -1/+11 |
2016-08-10 | perf/x86: Ensure perf_sched_cb_{inc,dec}() is only called from pmu::{add,del}() | Peter Zijlstra | 1 | -6/+2 |
2016-08-10 | perf/x86/intel: Rework the large PEBS setup code | Peter Zijlstra | 1 | -35/+67 |