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path: root/arch/sh/drivers/pci
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2009-04-20sh: pci: Consolidate bus<->resource mapping in pci-lib.Paul Mundt3-45/+31
Now that the io and mem offsets are tracked accordingly, the pci-new version of the bus<->resource mappers can be used generically. This moves them in to pci-lib. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-20sh: pci: Track io and mem_offset per-channel.Paul Mundt2-9/+11
This implements a per-hose offset for I/O and mem resources. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-20sh: pci: New-style controller registration.Paul Mundt2-72/+112
This moves off of the board_pci_channels[] approach for bus registration and over to a cleaner register_pci_controller(), all derived from the MIPS code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-20sh: pci: Consolidate pci_iomap() and use the generic I/O base.Paul Mundt3-70/+51
This consolidates the pci_iomap() definitions and reworks how the I/O port base is handled. PCI channels can register their own I/O map base, or if none is provided, the system-wide generic I/O base is used instead. Functionally nothing changes, while this allows us to kill off lots of I/O address special casing and lookups. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-20sh: pci: Kill off unused pcibios_fixup().Paul Mundt1-5/+0
This is left over cruft that hasn't been used by anything in a long time, kill off bits that weren't purged previously. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-20sh: pci: Consolidate pcibios_align_resource() definitions.Paul Mundt3-46/+42
This introduces a saner pcibios_align_resource() that can be used regardless of whether pci-auto or pci-new are being used, and consolidates it in pci-lib.c. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-20sh: pci: HAVE_PCI_MMAP support.Paul Mundt2-3/+29
Derived from the MIPS version, now uses pgprot_noncached(). Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-20sh: pci: Split out new-style PCI core.Paul Mundt3-4/+258
This splits off a 'pci-new.c' which is aimed at gradually replacing the pci-auto backend and the arch/sh/drivers/pci/pci.c core respectively. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-20sh: pci: Drop asm-generic/pci.h, so we can use our own fixups.Paul Mundt1-0/+14
The new PCI code wants its own bus<->resource mappings instead of the generic equivalents, so drop the asm-generic include in preparation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Start unifying the SH7780 PCIC initialization.Paul Mundt4-70/+37
This starts moving out the common initialization bits from the various fixup paths in to the shared init path. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Consolidate SH7780 PCIC IRQ routing.Paul Mundt7-137/+31
Now that the platform code is a bit leaner, we can start consolidating the various IRQ routing implementations. There are effectively only 2 variants, and the others can use those directly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Kill off platform-specific multi-window mappings.Paul Mundt6-95/+16
Commit 68b42d1b548be1840aff7122fdebeb804daf0fa3 ("sh: sh7785lcr: Map whole PCI address space.") changed around the semantics of how various chip-selects are made accessible to PCI. Now that there is a single large mapping covering from CS0-CS6, there is no longer any need to do multi-window mapping. Subsequently, all of the differing implementations can be consolidated in to pci-sh7780. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Consolidate PCI I/O and mem window definitions for SH7780.Paul Mundt6-90/+27
This consolidates all of the PCI I/O and memory window definitions across the pci-sh7780 users in pci-sh7780 itself. No functional changes, in that every platform had exactly the same implementation. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Set the I/O port base to the SH7780 I/O window default.Paul Mundt1-0/+2
Presently the I/O port base isn't being set anywhere, which allows things like generic_inl() to blow up. Fix this up to point at the PCI IO window. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Set pci_cache_line_size on SH7780 via the PCICLS register.Paul Mundt1-9/+12
The SH7780 PCIC contains a read-only cache line size register that we can derive pci_cache_line_size from. So, make sure that the software idea of the cache line size actually matches the host controller's idea. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Use the proper write size for class/sub-class code.Paul Mundt1-2/+4
Don't use pci_write_reg() for these, as it defaults to 32-bit. Rather than using the helper, use __raw_writeb() directly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Rework SH7780 host controller detection.Paul Mundt2-21/+26
This reworks how the host controller is probed, and makes it a bit more verbose in the event a new type of controller is detected. Additionally, we also log the revision information. This now uses the proper access sizes for the vendor/device registers, rather than relying on a larger access that encapsulated both of them. Not all devices support 32-bit read cycles for these registers. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Set class/sub-class code correctly for SH7780 PCIC.Paul Mundt2-8/+3
The SH7780 PCI host controller implements a configuration header that requires a fair bit of hand-holding to initialize properly. By default it appears as a pre-2.0 host controller given the zeroed out class code, so fix this up properly. Some boards that happened to be using the R7780RP version of the PCIC fixups had set this correctly, but this belongs in the standard initialization, and is by no means board specific. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Prefer P1SEG over P1SEGADDR for CONFIG_CMD.Paul Mundt1-3/+3
P1SEGADDR is obsolete and will be killed off completely in the future, so transition off of it and reference P1SEG explicitly. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Move se7780 INTC fixups out of pci-sh7780.c.Paul Mundt1-24/+0
These fixups belong in the board INTC setup code, not in the middle of pci-sh7780.c. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-17sh: pci: Kill off useless debugging printk() in pci-sh7780 init.Paul Mundt1-12/+0
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: pci: Kill off unused SH4_PCIC_NO_RESET code.Paul Mundt12-58/+0
Nothing ended up using this anymore, so just kill it off. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: pci: drop duplicate PCIC fixups for SE7780 and SH7785LCR.Paul Mundt3-111/+2
SE7780 has the same PCIC fixup as SDK7780, and SH7785LCR the same as R7780RP. Switch to using those, and drop the duplicate code. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: sh7785lcr: Update for recent PCI changes.Paul Mundt2-18/+19
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: drop duplicate symbol export on dreamcast and sh7785lcr.Paul Mundt2-2/+0
With board_pci_channels now being exported in a single place, update the boards that duplicated the export. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: export board_pci_channels in one placeMagnus Damm8-8/+2
Instead of sometimes exporting board_pci_channels[] in the board specific code just export it in one place. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: pci io port base address codeMagnus Damm1-1/+0
Adds a __get_pci_io_base() function which is used to match a port range against struct pci_channel. This allows us to detect if a port range is assigned to pci or happens to be legacy port io. While at it, remove unused cpu-specific cruft. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: pci memory range checking codeMagnus Damm1-3/+2
This patch changes the code to use __is_pci_memory() instead of is_pci_memaddr(). __is_pci_memory() loops through all the pci channels on the system to match memory windows. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: add io_base member to pci_channelMagnus Damm2-4/+6
Store the io window base address in struct pci_channel and use that one instead of SH77xx_PCI_IO_BASE. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: add reg_base member to pci_channelMagnus Damm6-6/+8
Store the base address of the pci host controller registers in struct pci_channel and use the address in pci_read_reg() and pci_write_reg(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: hook in struct pci_channel in sysdataMagnus Damm2-5/+8
Store a struct pci_channel pointer in bus->sysdata. This makes whatever struct pci_channel assigned to a bus available for sh4_pci_read() and sh4_pci_write(). We also modify PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM to use bus->sysdata - this to gives us support for multiple pci channels. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: avoid using PCIBIOS_MIN_xxxMagnus Damm6-20/+19
Replaces PCIBIOS_MIN_IO and PCIBIOS_MIN_MEM with direct struct pci_channel access. This allows us to have more than one pci channel. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: add init member to pci_channel dataMagnus Damm18-36/+54
This patch adds an init callback to struct pci_channel and makes sure it is initialized properly. Code is added to call this init function from pcibios_init(). Return values are adjusted and a warning is is printed if init fails. Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-16sh: pass along struct pci_channelMagnus Damm19-149/+164
These patches rework the pci code for the sh architecture. Currently each board implements some kind of ioport to address mapping. Some boards use generic_io_base others try passing addresses as io ports. This is the first set of patches that try to unify the pci code as much as possible to avoid duplicated code. This will in the end lead to fewer lines board specific code and more generic code. This patch makes sure a struct pci_channel pointer is passed along to various pci functions such as pci_read_reg(), pci_write_reg(), pci_fixup_pcic(), sh7751_pcic_init() and sh7780_pcic_init(). Signed-off-by: Magnus Damm <damm@igel.co.jp> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-14sh: Add in PCI bus for DMA API debugging.Paul Mundt1-0/+3
This adds in the pci_bus_type for DMA API debug. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-06sh: sh7785lcr: fix PCI address map for 32-bit modeYoshihiro Shimoda2-0/+7
Fix the problem that cannot work PCI device on 32-bit mode because influence of the commit 68b42d1b548be1840aff7122fdebeb804daf0fa3 ("sh: sh7785lcr: Map whole PCI address space."). So this patch was implement like a 29-bit mode, map whole physical address space of DDR-SDRAM. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-04-04sh: sh7785lcr: Map whole PCI address space.Takashi Yoshii2-17/+8
PCI still doesn't work on sh7785lcr 29bit 256M map mode. On SH7785, PCI -> SHwy address translation is not base+offset but somewhat like base|offset (See HW Manual (rej09b0261) Fig. 13.11). So, you can't export CS2,3,4,5 by 256M at CS2 (results CS0,1,2,3 exported, I guess). There are two candidates. a) 128M@CS2 + 128M@CS4 b) 512M@CS0 Attached patch is B. It maps 512M Byte at 0 independently of memory size. It results CS0 to CS6 and perhaps some more being accessible from PCI. Tested on 7785lcr 29bit 128M map 7785lcr 29bit 256M map (NOT tested on 32bit) Signed-off-by: Takashi YOSHII <yoshii.takashi@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-03-10sh: pci-sh7780: fix pci memory address for fixed PMBYoshihiro Shimoda1-2/+2
Fix the problem that cannot work a PCI device when 32-bit physical address mode. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2009-01-07PCI: sh: use generic INTx swizzle from PCI coreBjorn Helgaas1-16/+1
Use the generic pci_common_swizzle() instead of arch-specific code. Note that pci_common_swizzle() loops based on dev->bus->self, not dev->bus->parent as the sh simple_swizzle() did. I think they are equivalent for this purpose. Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2009-01-07PCI: sh: use generic pci_swizzle_interrupt_pin()Bjorn Helgaas2-13/+3
Use the generic pci_swizzle_interrupt_pin() instead of arch-specific code. Acked-by: Paul Mundt <lethal@linux-sh.org> Signed-off-by: Bjorn Helgaas <bjorn.helgaas@hp.com> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
2008-12-22sh: mach-sh03: Use __set_io_port_base(), kill off special ioport_map().Paul Mundt1-1/+2
This also fixes up a long-standing bug for this platform where the PIO base was set to a register offset, rather than the actual PIO offset itself. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-12-22sh: pci-sh7780: fix pci memory address maskYoshihiro Shimoda1-7/+5
Fix the problem that cannot work a PCI device when system memory size is 256Mbyte in 29bit address mode. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-10-20sh: Migrate common board headers to mach-common/.Paul Mundt5-5/+5
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-07-29sh: Move out the solution engine headers to arch/sh/include/mach-se/Paul Mundt1-1/+1
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-07-29sh: migrate to arch/sh/include/Paul Mundt4-4/+4
This follows the sparc changes a439fe51a1f8eb087c22dd24d69cebae4a3addac. Most of the moving about was done with Sam's directions at: http://marc.info/?l=linux-sh&m=121724823706062&w=2 with subsequent hacking and fixups entirely my fault. Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-07-28sh: Renesas R0P7785LC0011RL board supportYoshihiro Shimoda3-0/+113
This adds initial support for the Renesas R0P7785LC0011RL board. This patch supports 29bit address mode only. Signed-off-by: Yoshihiro Shimoda <shimoda.yoshihiro@renesas.com> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-07-28sh: make pcibios_max_latency staticAdrian Bunk1-1/+1
This patch makes the needlessly global pcibios_max_latency static. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-07-28sh: make EARLY_PCI_OP's staticAdrian Bunk1-1/+1
This patch makes the needlessly global EARLY_PCI_OP's static. Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-07-28sh dreamcast: export board_pci_channelsAdrian Bunk1-0/+2
This patch fixes the following build error: <-- snip --> ... MODPOST 1837 modules ERROR: "board_pci_channels" [drivers/pcmcia/yenta_socket.ko] undefined! ... make[2]: *** [__modpost] Error 1 <-- snip --> I freely admit that it's a pathological configuration, but as long as it is allowed it should build. Reported-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Adrian Bunk <bunk@kernel.org> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
2008-06-28PCI: remove unused arch pcibios_update_resource() functionsAdrian Bunk1-32/+0
Russell King did the following back in 2003: <-- snip --> [PCI] pci-9: Kill per-architecture pcibios_update_resource() Kill pcibios_update_resource(), replacing it with pci_update_resource(). pci_update_resource() uses pcibios_resource_to_bus() to convert a resource to a device BAR - the transformation should be exactly the same as the transformation used for the PCI bridges. pci_update_resource "knows" about 64-bit BARs, but doesn't attempt to set the high 32-bits to anything non-zero - currently no architecture attempts to do something different. If anyone cares, please fix; I'm going to reflect current behaviour for the time being. Ivan pointed out the following architectures need to examine their pcibios_update_resource() implementation - they should make sure that this new implementation does the right thing. #warning's have been added where appropriate. ia64 mips mips64 This cset also includes a fix for the problem reported by AKPM where 64-bit arch compilers complain about the resource mask being placed in a u32. <-- snip --> This patch removes the unused pcibios_update_resource() functions the kernel gained since, from FRV, m68k, mips & sh architectures. Signed-off-by: Adrian Bunk <bunk@kernel.org> Acked-by: David Howells <dhowells@redhat.com> Acked-by: Greg Ungerer <gerg@uclinux.org> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org>
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