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2022-01-09riscv: dts: sifive: fu540-c000: Fix PLIC nodeGeert Uytterhoeven1-2/+3
2022-01-09riscv: dts: sifive: fu540-c000: Drop bogus soc node compatible valuesGeert Uytterhoeven1-1/+1
2022-01-09riscv: dts: sifive: Group tuples in register propertiesGeert Uytterhoeven1-6/+6
2022-01-09riscv: dts: sifive: Group tuples in interrupt propertiesGeert Uytterhoeven2-17/+18
2022-01-09riscv: dts: microchip: mpfs: Group tuples in interrupt propertiesGeert Uytterhoeven1-15/+16
2022-01-09riscv: dts: microchip: mpfs: Fix clock controller nodeGeert Uytterhoeven1-9/+0
2022-01-09riscv: dts: microchip: mpfs: Fix reference clock nodeGeert Uytterhoeven2-7/+9
2022-01-09riscv: dts: microchip: mpfs: Fix PLIC nodeGeert Uytterhoeven1-2/+3
2022-01-09riscv: dts: microchip: mpfs: Drop empty chosen nodeGeert Uytterhoeven1-3/+0
2022-01-09riscv: dts: canaan: Group tuples in interrupt propertiesGeert Uytterhoeven1-11/+12
2022-01-09riscv: dts: canaan: Fix SPI FLASH node namesGeert Uytterhoeven4-4/+4
2022-01-08kbuild: do not quote string values in include/config/auto.confMasahiro Yamada1-3/+1
2022-01-08riscv/mm: Enable THP migrationNanyong Sun2-0/+6
2022-01-08riscv/mm: Adjust PAGE_PROT_NONE to comply with THP semanticsNanyong Sun2-6/+7
2022-01-07riscv/head: fix misspelling of guaranteedhasheddan1-1/+1
2022-01-06RISC-V: Clean up the defconfigsPalmer Dabbelt6-17/+10
2022-01-06RISC-V: defconfigs: Remove redundant K210 DT sourcePalmer Dabbelt2-2/+0
2022-01-06KVM: RISC-V: Avoid spurious virtual interrupts after clearing hideleg CSRVincent Chen1-0/+8
2022-01-06RISC-V: KVM: Add VM capability to allow userspace get GPA bitsAnup Patel3-0/+9
2022-01-06RISC-V: KVM: Forward SBI experimental and vendor extensionsAnup Patel2-0/+31
2022-01-06RISC-V: KVM: make kvm_riscv_vcpu_fp_clean() staticJisheng Zhang1-1/+1
2022-01-06RISC-V: KVM: Add SBI HSM extension in KVMAtish Patra5-0/+134
2022-01-06RISC-V: KVM: Add v0.1 replacement SBI extensions defined in v0.2Atish Patra3-0/+143
2022-01-06RISC-V: KVM: Add SBI v0.2 base extensionAtish Patra5-1/+85
2022-01-06RISC-V: KVM: Reorganize SBI code by moving SBI v0.1 to its own fileAtish Patra4-131/+146
2022-01-06RISC-V: KVM: Mark the existing SBI implementation as v0.1Atish Patra2-32/+144
2022-01-06KVM: RISC-V: Use common KVM implementation of MMU memory cachesSean Christopherson4-65/+18
2022-01-06RISC-V: defconfigs: Remove redundant CONFIG_EFI=yPalmer Dabbelt1-1/+0
2022-01-06RISC-V: defconfigs: Remove redundant CONFIG_POWER_RESETPalmer Dabbelt2-2/+0
2022-01-06RISC-V: defconfigs: Sort CONFIG_BLK_DEV_BSGPalmer Dabbelt2-2/+0
2022-01-06RISC-V: defconfigs: Sort CONFIG_SURFACE_PLATFORMSPalmer Dabbelt2-2/+0
2022-01-06RISC-V: defconfigs: Sort CONFIG_MMCPalmer Dabbelt1-1/+1
2022-01-06RISC-V: defconfigs: Sort CONFIG_PTP_1588_CLOCKPalmer Dabbelt1-1/+1
2022-01-06RISC-V: defconfigs: Sort CONFIG_SOC_POLARFIREPalmer Dabbelt1-1/+1
2022-01-06RISC-V: defconfigs: Sort CONFIG_SYSFS_SYSCALLPalmer Dabbelt2-2/+2
2022-01-06RISC-V: defconfigs: Sort CONFIG_BPF_SYSCALLPalmer Dabbelt2-2/+2
2022-01-06RISC-V: MAXPHYSMEM_2GB doesn't depend on CMODEL_MEDLOWPalmer Dabbelt1-1/+1
2022-01-06RISC-V: defconfigs: Set CONFIG_FB=y, for FB consolePalmer Dabbelt2-0/+2
2022-01-06riscv: mm: Enable PMD split page table lock for RV64Kefeng Wang2-1/+3
2022-01-06riscv: Make vmalloc/vmemmap end equal to the start of the next regionAlexandre Ghiti2-3/+3
2022-01-06riscv: switch to relative extable and other improvementsPalmer Dabbelt11-201/+290
2022-01-06riscv: vmlinux.lds.S|vmlinux-xip.lds.S: remove `.fixup` sectionJisheng Zhang2-2/+0
2022-01-06riscv: extable: add a dedicated uaccess handlerJisheng Zhang4-70/+78
2022-01-06riscv: add gpr-num.hJisheng Zhang1-0/+77
2022-01-06riscv: extable: add `type` and `data` fieldsJisheng Zhang5-18/+56
2022-01-06riscv: extable: consolidate definitionsJisheng Zhang4-10/+37
2022-01-06riscv: lib: uaccess: fold fixups into bodyJisheng Zhang1-11/+11
2022-01-06riscv: extable: use `ex` for `exception_table_entry`Jisheng Zhang1-5/+5
2022-01-06riscv: extable: make fixup_exception() return boolJisheng Zhang3-10/+10
2022-01-06riscv: bpf: move rv_bpf_fixup_exception signature to extable.hJisheng Zhang3-8/+12