starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2018-02-07	Merge tag 'riscv-for-linus-4.16-merge_window' of git://git.kernel.org/pub/scm...	Linus Torvalds	2	-6/+10
2018-02-01	Merge branch 'work.whack-a-mole' of git://git.kernel.org/pub/scm/linux/kernel...	Linus Torvalds	1	-1/+0
2018-01-31	riscv: rename sptbr to satp	Christoph Hellwig	1	-0/+4
2018-01-31	riscv: don't read back satp in paging_init	Christoph Hellwig	1	-2/+0
2018-01-31	riscv: add ZONE_DMA32	Christoph Hellwig	1	-4/+6
2018-01-08	riscv: rename SR_* constants to match the spec	Christoph Hellwig	1	-1/+1
2017-12-05	riscv: use linux/uaccess.h, not asm/uaccess.h...	Al Viro	1	-1/+0
2017-12-02	RISC-V: Fixes for clean allmodconfig build	Palmer Dabbelt	1	-1/+1
2017-11-30	RISC-V: Flush I$ when making a dirty page executable	Andrew Waterman	2	-0/+24
2017-11-30	RISC-V: io.h: type fixes for warnings	Olof Johansson	1	-1/+1
2017-09-27	RISC-V: Build Infrastructure	Palmer Dabbelt	1	-0/+4
2017-09-27	RISC-V: Paging and MMU	Palmer Dabbelt	1	-0/+282
2017-09-27	RISC-V: Device, timer, IRQs, and the SBI	Palmer Dabbelt	1	-0/+92
2017-09-27	RISC-V: ELF and module implementation	Palmer Dabbelt	1	-0/+37
2017-09-27	RISC-V: Init and Halt Code	Palmer Dabbelt	1	-0/+70