starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2019-10-01	riscv: Fix memblock reservation for device tree blob	Albert Ou	1	-1/+11
2019-08-30	RISC-V: Implement sparsemem	Logan Gunthorpe	1	-0/+10
2019-08-30	riscv: Using CSR numbers to access CSRs	Bin Meng	1	-1/+1
2019-07-09	RISC-V: Setup initial page tables in two stages	Anup Patel	1	-52/+255
2019-07-04	riscv: remove free_initrd_mem	Christoph Hellwig	1	-5/+0
2019-07-01	RISC-V: Fix memory reservation in setup_bootmem()	Anup Patel	1	-7/+7
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	Thomas Gleixner	1	-9/+1
2019-05-14	riscv: switch over to generic free_initmem()	Mike Rapoport	1	-5/+0
2019-04-10	RISC-V: Fix Maximum Physical Memory 2GiB option for 64bit systems	Anup Patel	1	-0/+8
2019-03-27	RISC-V: Always compile mm/init.c with cmodel=medany and notrace	Anup Patel	1	-0/+28
2019-02-21	RISC-V: Free-up initrd in free_initrd_mem()	Anup Patel	1	-1/+2
2019-02-21	RISC-V: Implement compile-time fixed mappings	Anup Patel	1	-0/+34
2019-02-21	RISC-V: Move setup_vm() to mm/init.c	Anup Patel	1	-0/+49
2019-02-21	RISC-V: Move setup_bootmem() to mm/init.c	Anup Patel	1	-0/+70
2019-01-24	riscv: fixup max_low_pfn with PFN_DOWN.	Guo Ren	1	-1/+2
2018-10-31	mm: remove include/linux/bootmem.h	Mike Rapoport	1	-2/+1
2018-10-31	memblock: rename free_all_bootmem to memblock_free_all	Mike Rapoport	1	-1/+1
2018-07-04	RISC-V: Add conditional macro for zone of DMA32	Zong Li	1	-0/+2
2018-01-31	riscv: don't read back satp in paging_init	Christoph Hellwig	1	-2/+0
2018-01-31	riscv: add ZONE_DMA32	Christoph Hellwig	1	-4/+6
2017-09-27	RISC-V: Init and Halt Code	Palmer Dabbelt	1	-0/+70