starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2023-02-09	riscv: Fixup race condition on PG_dcache_clean in flush_icache_pte	Guo Ren	1	-1/+3
2022-12-10	Merge patch series "RISC-V: Ensure Zicbom has a valid block size"	Palmer Dabbelt	1	-0/+38
2022-12-02	riscv/mm: hugepage's PG_dcache_clean flag is only set in head page	Tong Tiangen	1	-0/+7
2022-10-21	RISC-V: Fix compilation without RISCV_ISA_ZICBOM	Andrew Jones	1	-0/+38
2022-01-20	RISC-V: Do not use cpumask data structure for hartid bitmap	Atish Patra	1	-4/+1
2021-10-05	riscv: Flush current cpu icache before other cpus	Alexandre Ghiti	1	-0/+2
2020-06-09	mm: reorder includes after introduction of linux/pgtable.h	Mike Rapoport	1	-1/+0
2020-06-09	mm: introduce include/linux/pgtable.h	Mike Rapoport	1	-1/+1
2019-12-28	riscv: export flush_icache_all to modules	Olof Johansson	1	-0/+1
2019-11-18	riscv: add nommu support	Christoph Hellwig	1	-0/+2
2019-11-14	riscv: implement remote sfence.i using IPIs	Christoph Hellwig	1	-6/+18
2019-09-05	riscv: cleanup riscv_cpuid_to_hartid_mask	Christoph Hellwig	1	-1/+0
2019-06-05	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 286	Thomas Gleixner	1	-9/+1
2019-05-17	riscv: move flush_icache_{all,mm} to cacheflush.c	Gary Guo	1	-0/+61
2017-11-30	RISC-V: Flush I$ when making a dirty page executable	Andrew Waterman	1	-0/+23