index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
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path:
root
/
arch
/
riscv
/
mm
/
Makefile
Age
Commit message (
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)
Author
Files
Lines
2023-06-14
riscv: mm: stub extable related functions/macros for !MMU
Jisheng Zhang
1
-2
/
+1
2023-04-19
riscv: Introduce CONFIG_RELOCATABLE
Alexandre Ghiti
1
-0
/
+4
2022-12-09
Merge patch series "Add PMEM support for RISC-V"
Palmer Dabbelt
1
-0
/
+1
2022-12-09
RISC-V: Implement arch specific PMEM APIs
Anup Patel
1
-0
/
+1
2022-10-29
riscv: Enable HAVE_ARCH_HUGE_VMAP for 64BIT
Liu Shixin
1
-0
/
+1
2022-07-29
riscv: Add support for non-coherent devices using zicbom extension
Heiko Stuebner
1
-0
/
+1
2022-03-04
riscv: Fix config KASAN && DEBUG_VIRTUAL
Alexandre Ghiti
1
-0
/
+3
2021-01-15
riscv: Fixup patch_text panic in ftrace
Guo Ren
1
-0
/
+1
2021-01-15
riscv: Fixup wrong ftrace remove cflag
Guo Ren
1
-1
/
+1
2020-07-30
riscv: Allow building with kcov coverage
Tobias Klauser
1
-0
/
+2
2020-03-26
riscv: Add support to dump the kernel page tables
Zong Li
1
-0
/
+1
2020-03-26
riscv: add ARCH_HAS_SET_MEMORY support
Zong Li
1
-1
/
+1
2020-01-23
riscv: mm: add support for CONFIG_DEBUG_VIRTUAL
Zong Li
1
-0
/
+2
2020-01-23
riscv: Add KASAN support
Nick Hu
1
-0
/
+6
2019-12-20
riscv: move sifive_l2_cache.c to drivers/soc
Christoph Hellwig
1
-1
/
+0
2019-11-28
Merge tag 'ioremap-5.5' of git://git.infradead.org/users/hch/ioremap
Linus Torvalds
1
-1
/
+1
2019-11-18
riscv: add nommu support
Christoph Hellwig
1
-2
/
+1
2019-11-11
riscv: use the generic ioremap code
Christoph Hellwig
1
-1
/
+0
2019-09-05
riscv: move the TLB flush logic out of line
Christoph Hellwig
1
-0
/
+3
2019-07-04
riscv: Introduce huge page support for 32/64bit kernel
Alexandre Ghiti
1
-0
/
+2
2019-05-21
treewide: Add SPDX license identifier - Makefile/Kconfig
Thomas Gleixner
1
-0
/
+1
2019-05-17
RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs
Yash Shah
1
-0
/
+1
2019-05-17
riscv: move switch_mm to its own file
Gary Guo
1
-0
/
+1
2019-03-27
RISC-V: Always compile mm/init.c with cmodel=medany and notrace
Anup Patel
1
-0
/
+6
2017-11-30
RISC-V: Flush I$ when making a dirty page executable
Andrew Waterman
1
-0
/
+1
2017-09-27
RISC-V: Build Infrastructure
Palmer Dabbelt
1
-0
/
+4