| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2018-12-21 | RISC-V: lib: minor asm cleanup | Olof Johansson | 2 | -48/+53 |
| 2018-11-13 | RISC-V: lib: Fix build error for 64-bit | Olof Johansson | 1 | -1/+1 |
| 2018-10-23 | RISC-V: Build tishift only on 64-bit | Zong Li | 1 | -1/+2 |
| 2018-08-13 | RISC-V: implement __lshrti3. | Alex Guo | 2 | -0/+43 |
| 2018-06-11 | RISC-V: Make our port sparse-clean | Palmer Dabbelt | 1 | -2/+4 |
| 2018-06-09 | riscv: split the declaration of __copy_user | Luc Van Oostenryck | 1 | -2/+4 |
| 2018-06-04 | riscv: Fix the bug in memory access fixup code | Alan Kao | 1 | -4/+9 |
| 2017-11-30 | RISC-V: Export some expected symbols for modules | Olof Johansson | 1 | -0/+1 |
| 2017-09-27 | RISC-V: Build Infrastructure | Palmer Dabbelt | 1 | -0/+6 |
| 2017-09-27 | RISC-V: Device, timer, IRQs, and the SBI | Palmer Dabbelt | 1 | -0/+110 |
| 2017-09-27 | RISC-V: Generic library routines and assembly | Palmer Dabbelt | 4 | -0/+390 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |