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2018-10-23RISC-V: SMP cleanup and new featuresPalmer Dabbelt7-47/+195
2018-10-23RISC-V: Fix some RV32 bugs and build failuresPalmer Dabbelt1-0/+3
2018-10-23riscv: Add support to no-FPU systemsPalmer Dabbelt6-115/+168
2018-10-23RISC-V: remove the unused return_to_handler exportChristoph Hellwig1-1/+0
2018-10-23RISC-V: Add FP register ptrace support for gdb.Jim Wilson1-0/+52
2018-10-23RISC-V: Mask out the F extension on systems without DPalmer Dabbelt1-0/+7
2018-10-23RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}Palmer Dabbelt1-7/+0
2018-10-23RISC-V: Show IPI statsAnup Patel2-7/+40
2018-10-23RISC-V: Show CPU ID and Hart ID separately in /proc/cpuinfoAnup Patel1-4/+6
2018-10-23RISC-V: Use Linux logical CPU number instead of hartidAtish Patra5-22/+45
2018-10-23RISC-V: Add logical CPU indexing for RISC-VAtish Patra2-0/+23
2018-10-23RISC-V: Use WRITE_ONCE instead of direct accessAtish Patra1-2/+3
2018-10-23RISC-V: Use mmgrab()Palmer Dabbelt1-1/+2
2018-10-23RISC-V: Rename im_okay_therefore_i_am to found_boot_cpuPalmer Dabbelt1-4/+5
2018-10-23RISC-V: Rename riscv_of_processor_hart to riscv_of_processor_hartidPalmer Dabbelt2-3/+6
2018-10-23RISC-V: Disable preemption before enabling interruptsAtish Patra1-1/+5
2018-10-23RISC-V: Comment on the TLB flush in smp_callin()Palmer Dabbelt1-0/+4
2018-10-23RISC-V: Filter ISA and MMU values in cpuinfoPalmer Dabbelt1-7/+61
2018-10-23RISC-V: Don't set cacheinfo.{physical_line_partition,attributes}Palmer Dabbelt1-7/+0
2018-10-23RISC-V: No need to pass scause as arg to do_IRQ()Anup Patel2-3/+2
2018-10-23RISC-V: Use swiotlb on RV64 onlyZong Li1-0/+3
2018-10-23Auto-detect whether a FPU existsAlan Kao3-3/+15
2018-10-23Allow to disable FPU supportAlan Kao3-2/+9
2018-10-23Refactor FPU code in signal setup/return proceduresAlan Kao1-27/+41
2018-10-23Extract FPU context operations from entry.SAlan Kao3-87/+107
2018-10-02RISCV: Fix end PFN for low memoryAtish Patra1-1/+1
2018-09-05riscv: Do not overwrite initrd_start and initrd_endGuenter Roeck1-7/+0
2018-08-28RISC-V: Use a less ugly workaround for unused variable warningsPalmer Dabbelt1-14/+1
2018-08-20RISC-V: Define sys_riscv_flush_icache when SMP=nPalmer Dabbelt1-2/+10
2018-08-13RISC-V: Fix !CONFIG_SMP compilation errorAtish Patra1-1/+0
2018-08-13RISC-V: Add the directive for alignment of stvec's valueZong Li1-0/+2
2018-08-13clocksource: new RISC-V SBI timer driverPalmer Dabbelt3-9/+4
2018-08-13RISC-V: implement low-level interrupt handlingChristoph Hellwig2-11/+45
2018-08-13RISC-V: simplify software interrupt / IPI codeChristoph Hellwig1-4/+2
2018-08-13RISC-V: remove timer leftoversChristoph Hellwig1-21/+0
2018-08-13RISC-V: Add early printk support via the SBI consolePalmer Dabbelt1-0/+27
2018-08-13RISC-V: Don't increment sepc after breakpoint.Jim Wilson1-1/+0
2018-08-13RISC-V: Use KBUILD_CFLAGS instead of KCFLAGS when building the vDSOPalmer Dabbelt1-2/+2
2018-07-05RISC-V: Fix the rv32i kernel buildPalmer Dabbelt1-11/+11
2018-07-05RISC-V: Fix PTRACE_SETREGSET bug.Jim Wilson1-1/+1
2018-07-05RISC-V: Don't include irq-riscv-intc.hPalmer Dabbelt1-4/+0
2018-07-05riscv: remove unnecessary of_platform_populate callRob Herring1-5/+0
2018-07-05RISC-V: fix R_RISCV_ADD32/R_RISCV_SUB32 relocationsAndreas Schwab1-2/+2
2018-07-04RISC-V: Change variable type for 32-bit compatibleZong Li1-11/+11
2018-06-16Merge tag 'riscv-for-linus-4.18-merge_window' of git://git.kernel.org/pub/scm...Linus Torvalds6-3/+503
2018-06-11RISC-V: Make our port sparse-cleanPalmer Dabbelt2-2/+3
2018-06-11RISC-V: Handle R_RISCV_32 in modulesAndreas Schwab1-0/+12
2018-06-11riscv/ftrace: Export _mcount when DYNAMIC_FTRACE isn't setAlan Kao1-1/+1
2018-06-09riscv: split the declaration of __copy_userLuc Van Oostenryck1-1/+2
2018-06-08Merge tag 'arm64-upstream' of git://git.kernel.org/pub/scm/linux/kernel/git/a...Linus Torvalds1-1/+0