| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2022-03-31 | RISC-V: Declare per cpu boot data as static | Atish Patra | 1 | -1/+1 |
| 2022-03-11 | RISC-V: Add SBI HSM suspend related defines | Anup Patel | 1 | -1/+1 |
| 2022-01-20 | RISC-V: Avoid using per cpu array for ordered booting | Atish Patra | 1 | -6/+20 |
| 2020-03-31 | RISC-V: Support cpu hotplug | Atish Patra | 1 | -0/+34 |
| 2020-03-31 | RISC-V: Add supported for ordered booting method using HSM | Atish Patra | 1 | -0/+81 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |