| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2018-12-17 | RISC-V: defconfig: Enable RISC-V SBI earlycon support | Anup Patel | 1 | -0/+1 |
| 2018-11-13 | RISC-V: defconfig: Enable printk timestamps | Anup Patel | 1 | -0/+1 |
| 2018-11-02 | RISC-V: refresh defconfig | Anup Patel | 1 | -8/+8 |
| 2018-08-13 | irqchip: add a SiFive PLIC driver | Christoph Hellwig | 1 | -0/+1 |
| 2018-06-11 | RISC-V: Add CONFIG_HVC_RISCV_SBI=y to defconfig | Palmer Dabbelt | 1 | -0/+1 |
| 2018-04-03 | RISC-V: Enable module support in defconfig | Zong Li | 1 | -0/+2 |
| 2018-01-08 | RISC-V: Add a basic defconfig | Karsten Merker | 1 | -0/+75 |
| 2017-09-27 | RISC-V: Build Infrastructure | Palmer Dabbelt | 1 | -0/+0 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |