index
:
starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
summary
refs
log
tree
commit
diff
log msg
author
committer
range
path:
root
/
arch
/
riscv
/
Kconfig.socs
Age
Commit message (
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)
Author
Files
Lines
2020-05-18
riscv: K210: Add a built-in device tree
Palmer Dabbelt
1
-1
/
+16
2020-05-13
riscv: Fix unmet direct dependencies built based on SOC_VIRT
Kefeng Wang
1
-8
/
+9
2020-04-09
Merge tag 'riscv-for-linus-5.7' of git://git.kernel.org/pub/scm/linux/kernel/...
Linus Torvalds
1
-0
/
+10
2020-04-03
riscv: Select required drivers for Kendryte SOC
Damien Le Moal
1
-0
/
+4
2020-04-03
riscv: Add Kendryte K210 SoC support
Christoph Hellwig
1
-0
/
+30
2020-03-26
RISC-V: Only select essential drivers for SOC_VIRT config
Anup Patel
1
-14
/
+0
2020-03-05
RISC-V: Select Goldfish RTC driver for QEMU virt machine
Anup Patel
1
-0
/
+2
2020-03-05
RISC-V: Select SYSCON Reboot and Poweroff for QEMU virt machine
Anup Patel
1
-0
/
+2
2020-03-05
RISC-V: Add kconfig option for QEMU virt machine
Anup Patel
1
-0
/
+20
2019-12-09
riscv: only select serial sifive if TTY is enabled
Kefeng Wang
1
-2
/
+2
2019-11-21
riscv: Fix Kconfig indentation
Krzysztof Kozlowski
1
-8
/
+8
2019-07-01
riscv: select SiFive platform drivers with SOC_SIFIVE
Loys Ollivier
1
-0
/
+5
2019-07-01
arch: riscv: add config option for building SiFive's SoC resource
Loys Ollivier
1
-0
/
+8