starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2020-07-22	powerpc/perf: Update Power PMU cache_events to u64 type	Athira Rajeev	1	-1/+1
2020-07-21	powerpc/perf: Update cpu_hw_event to use `struct` for storing MMCR registers	Athira Rajeev	1	-8/+9
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	Thomas Gleixner	1	-5/+1
2019-05-02	powerpc/perf: init pmu from core-book3s	Madhavan Srinivasan	1	-3/+1
2018-10-03	powerpc/perf: Add missing break in power7_marked_instr_event()	Michael Ellerman	1	-0/+1
2016-09-13	powerpc/sparse: Make a bunch of things static	Daniel Axtens	1	-1/+1
2016-03-10	powerpc/perf: Remove PME_ prefix for power7 events	Sukadev Bhattiprolu	1	-9/+9
2014-07-28	powerpc/perf: Pass the struct perf_events down to compute_mmcr()	Michael Ellerman	1	-1/+1
2013-07-12	perf tools: Make Power7 events available for perf	Runzhen Wang	1	-116/+32
2013-07-09	perf tools: fix a typo of a Power7 event name	Runzhen Wang	1	-6/+6
2013-05-29	perf: Power7: Make CPI stack events available in sysfs	Sukadev Bhattiprolu	1	-0/+73
2013-03-14	perf/POWER7: Create a sysfs format entry for Power7 events	Sukadev Bhattiprolu	1	-0/+13
2013-01-31	perf/POWER7: Make some POWER7 events available in sysfs	Sukadev Bhattiprolu	1	-0/+18
2013-01-31	perf/POWER7: Make generic event translations available in sysfs	Sukadev Bhattiprolu	1	-0/+34
2013-01-31	perf/Power7: Use macros to identify perf events	Sukadev Bhattiprolu	1	-8/+20
2012-11-15	powerpc/perf: Add missing L2 constraint handling in Power7 PMU	Michael Ellerman	1	-3/+14
2012-09-27	powerpc/perf: Sample only if SIAR-Valid bit is set in P7+	sukadev@linux.vnet.ibm.com	1	-0/+3
2012-02-23	powerpc/perf: Move perf core & PMU code into a subdirectory	Michael Ellerman	1	-0/+379