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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
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powerpc
/
kernel
/
mce_power.c
Age
Commit message (
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Author
Files
Lines
2018-10-04
powerpc/64s/hash: Do not use PPC_INVALIDATE_ERAT on CPUs before POWER9
Nicholas Piggin
1
-0
/
+7
2018-09-19
powerpc/pseries: Flush SLB contents on SLB MCE errors.
Mahesh Salgaonkar
1
-1
/
+1
2018-08-10
powerpc/64s: move machine check SLB flushing to mm/slb.c
Nicholas Piggin
1
-17
/
+9
2018-07-12
powerpc/64s: Report SLB multi-hit rather than parity error
Michael Ellerman
1
-9
/
+9
2018-04-24
powerpc/mce: Fix a bug where mce loops on memory UE.
Mahesh Salgaonkar
1
-5
/
+2
2018-01-17
powerpc/64s: Improve local TLB flush for boot and MCE on POWER9
Nicholas Piggin
1
-113
/
+2
2017-11-10
Merge branch 'fixes' into next
Michael Ellerman
1
-0
/
+13
2017-11-06
powerpc/64s: Replace CONFIG_PPC_STD_MMU_64 with CONFIG_PPC_BOOK3S_64
Michael Ellerman
1
-2
/
+2
2017-10-16
powerpc/mce: Hookup ierror (instruction) UE errors
Balbir Singh
1
-3
/
+19
2017-10-16
powerpc/mce: Hookup derror (load/store) UE errors
Balbir Singh
1
-5
/
+82
2017-10-04
powerpc/powernv: Use early_radix_enabled in POWER9 tlb flush
Nicholas Piggin
1
-1
/
+1
2017-09-29
powerpc: Fix workaround for spurious MCE on POWER9
Michael Neuling
1
-2
/
+2
2017-09-26
powerpc: Handle MCE on POWER9 with only DSISR bit 30 set
Michael Neuling
1
-0
/
+13
2017-07-11
powerpc/powernv: Fix local TLB flush for boot and MCE on POWER9
Nicholas Piggin
1
-1
/
+55
2017-06-06
powerpc/64s: Machine check handle ifetch from foreign real address for POWER9
Nicholas Piggin
1
-0
/
+3
2017-04-19
powerpc/64s: Minor fix for MCE TLB flush for radix
Nicholas Piggin
1
-2
/
+6
2017-03-21
powerpc/64s: POWER8 add missing machine check definitions
Nicholas Piggin
1
-7
/
+19
2017-03-21
powerpc/64s: Data driven machine check handling
Nicholas Piggin
1
-254
/
+74
2017-03-21
powerpc/64s: Data driven machine check evaluation
Nicholas Piggin
1
-243
/
+326
2017-03-21
powerpc/64s: Move POWER machine check defines into mce_power.c
Nicholas Piggin
1
-0
/
+92
2017-03-21
powerpc/64s: Clean up machine check recovery flushing
Nicholas Piggin
1
-74
/
+23
2017-03-10
powerpc/64s: POWER9 machine check handler
Nicholas Piggin
1
-0
/
+231
2017-03-10
powerpc/64s: allow machine check handler to set severity and initiator
Nicholas Piggin
1
-0
/
+6
2016-05-11
powerpc/mm/radix: Fix CONFIG_PPC_MMU_STD_64 typo
Valentin Rothberg
1
-5
/
+5
2016-05-11
powerpc/mm/radix: Use STD_MMU_64 to properly isolate hash related code
Aneesh Kumar K.V
1
-0
/
+10
2016-05-01
powerpc/mm/radix: Add tlbflush routines
Aneesh Kumar K.V
1
-0
/
+3
2016-02-22
powerpc: Add POWER9 cputable entry
Michael Neuling
1
-9
/
+8
2015-03-16
powerpc/book3s: Fix flush_tlb cpu_spec hook to take a generic argument.
Mahesh Salgaonkar
1
-2
/
+51
2014-12-05
powerpc/book3s: Fix partial invalidation of TLBs in MCE code.
Mahesh Salgaonkar
1
-2
/
+2
2014-03-07
powerpc/book3s: Recover from MC in sapphire on SCOM read via MMIO.
Mahesh Salgaonkar
1
-4
/
+33
2013-12-30
powerpc: Fix endian issues in power7/8 machine check handler
Anton Blanchard
1
-3
/
+3
2013-12-05
powerpc/book3s: Decode and save machine check event.
Mahesh Salgaonkar
1
-8
/
+108
2013-12-05
powerpc/book3s: Flush SLB/TLBs if we get SLB/TLB machine check errors on power8.
Mahesh Salgaonkar
1
-0
/
+34
2013-12-05
powerpc/book3s: Flush SLB/TLBs if we get SLB/TLB machine check errors on power7.
Mahesh Salgaonkar
1
-0
/
+150