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2021-02-23arch: mips: update references to current linux-mips listLukas Bulwahn3-3/+3
The linux-mips mailing list now lives at kernel.org. Update all references in the kernel tree. Signed-off-by: Lukas Bulwahn <lukas.bulwahn@gmail.com> Reviewed-by: Huacai Chen <chenhuacai@kernel.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-23mips: bmips: init clocks earlierÁlvaro Fernández Rojas1-1/+1
device_initcall() is too late for bcm63xx. We need to call of_clk_init() earlier in order to properly boot. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-22arch: setup PF_IO_WORKER threads like PF_KTHREADJens Axboe1-1/+1
PF_IO_WORKER are kernel threads too, but they aren't PF_KTHREAD in the sense that we don't assign ->set_child_tid with our own structure. Just ensure that every arch sets up the PF_IO_WORKER threads like kthreads in the arch implementation of copy_thread(). Signed-off-by: Jens Axboe <axboe@kernel.dk>
2021-02-22arch: syscalls: remove $(srctree)/ prefix from syscall tablesMasahiro Yamada1-3/+3
The 'syscall' variables are not directly used in the commands. Remove the $(srctree)/ prefix because we can rely on VPATH. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org>
2021-02-22arch: syscalls: add missing FORCE and fix 'targets' to make if_changed workMasahiro Yamada1-13/+14
The rules in these Makefiles cannot detect the command line change because the prerequisite 'FORCE' is missing. Adding 'FORCE' will result in the headers being rebuilt every time because the 'targets' additions are also wrong; the file paths in 'targets' must be relative to the current Makefile. Fix all of them so the if_changed rules work correctly. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
2021-02-22Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvmLinus Torvalds2-2/+1
Pull KVM updates from Paolo Bonzini: "x86: - Support for userspace to emulate Xen hypercalls - Raise the maximum number of user memslots - Scalability improvements for the new MMU. Instead of the complex "fast page fault" logic that is used in mmu.c, tdp_mmu.c uses an rwlock so that page faults are concurrent, but the code that can run against page faults is limited. Right now only page faults take the lock for reading; in the future this will be extended to some cases of page table destruction. I hope to switch the default MMU around 5.12-rc3 (some testing was delayed due to Chinese New Year). - Cleanups for MAXPHYADDR checks - Use static calls for vendor-specific callbacks - On AMD, use VMLOAD/VMSAVE to save and restore host state - Stop using deprecated jump label APIs - Workaround for AMD erratum that made nested virtualization unreliable - Support for LBR emulation in the guest - Support for communicating bus lock vmexits to userspace - Add support for SEV attestation command - Miscellaneous cleanups PPC: - Support for second data watchpoint on POWER10 - Remove some complex workarounds for buggy early versions of POWER9 - Guest entry/exit fixes ARM64: - Make the nVHE EL2 object relocatable - Cleanups for concurrent translation faults hitting the same page - Support for the standard TRNG hypervisor call - A bunch of small PMU/Debug fixes - Simplification of the early init hypercall handling Non-KVM changes (with acks): - Detection of contended rwlocks (implemented only for qrwlocks, because KVM only needs it for x86) - Allow __DISABLE_EXPORTS from assembly code - Provide a saner follow_pfn replacements for modules" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (192 commits) KVM: x86/xen: Explicitly pad struct compat_vcpu_info to 64 bytes KVM: selftests: Don't bother mapping GVA for Xen shinfo test KVM: selftests: Fix hex vs. decimal snafu in Xen test KVM: selftests: Fix size of memslots created by Xen tests KVM: selftests: Ignore recently added Xen tests' build output KVM: selftests: Add missing header file needed by xAPIC IPI tests KVM: selftests: Add operand to vmsave/vmload/vmrun in svm.c KVM: SVM: Make symbol 'svm_gp_erratum_intercept' static locking/arch: Move qrwlock.h include after qspinlock.h KVM: PPC: Book3S HV: Fix host radix SLB optimisation with hash guests KVM: PPC: Book3S HV: Ensure radix guest has no SLB entries KVM: PPC: Don't always report hash MMU capability for P9 < DD2.2 KVM: PPC: Book3S HV: Save and restore FSCR in the P9 path KVM: PPC: remove unneeded semicolon KVM: PPC: Book3S HV: Use POWER9 SLBIA IH=6 variant to clear SLB KVM: PPC: Book3S HV: No need to clear radix host SLB before loading HPT guest KVM: PPC: Book3S HV: Fix radix guest SLB side channel KVM: PPC: Book3S HV: Remove support for running HPT guest on RPT host without mixed mode support KVM: PPC: Book3S HV: Introduce new capability for 2nd DAWR KVM: PPC: Book3S HV: Add infrastructure to support 2nd DAWR ...
2021-02-22Merge tag 'mips_5.12' of ↵Linus Torvalds122-898/+1021
git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux Pull MIPS updates from Thomas Bogendoerfer: - added support for Nintendo N64 - added support for Realtek RTL83XX SoCs - kaslr support for Loongson64 - first steps to get rid of set_fs() - DMA runtime coherent/non-coherent selection cleanup - cleanups and fixes * tag 'mips_5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (98 commits) Revert "MIPS: Add basic support for ptrace single step" vmlinux.lds.h: catch more UBSAN symbols into .data MIPS: kernel: Drop kgdb_call_nmi_hook MAINTAINERS: Add git tree for KVM/mips MIPS: Use common way to parse elfcorehdr MIPS: Simplify EVA cache handling Revert "MIPS: kernel: {ftrace,kgdb}: Set correct address limit for cache flushes" MIPS: remove CONFIG_DMA_PERDEV_COHERENT MIPS: remove CONFIG_DMA_MAYBE_COHERENT driver core: lift dma_default_coherent into common code MIPS: refactor the runtime coherent vs noncoherent DMA indicators MIPS/alchemy: factor out the DMA coherent setup MIPS/malta: simplify plat_setup_iocoherency MIPS: Add basic support for ptrace single step MAINTAINERS: replace non-matching patterns for loongson{2,3} MIPS: Make check condition for SDBBP consistent with EJTAG spec mips: Replace lkml.org links with lore Revert "MIPS: microMIPS: Fix the judgment of mm_jr16_op and mm_jalr_op" MIPS: crash_dump.c: Simplify copy_oldmem_page() Revert "mips: Manually call fdt_init_reserved_mem() method" ...
2021-02-21Merge tag 'oprofile-removal-5.12' of ↵Linus Torvalds17-1255/+2
git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/linux Pull oprofile and dcookies removal from Viresh Kumar: "Remove oprofile and dcookies support The 'oprofile' user-space tools don't use the kernel OPROFILE support any more, and haven't in a long time. User-space has been converted to the perf interfaces. The dcookies stuff is only used by the oprofile code. Now that oprofile's support is getting removed from the kernel, there is no need for dcookies as well. Remove kernel's old oprofile and dcookies support" * tag 'oprofile-removal-5.12' of git://git.kernel.org/pub/scm/linux/kernel/git/vireshk/linux: fs: Remove dcookies support drivers: Remove CONFIG_OPROFILE support arch: xtensa: Remove CONFIG_OPROFILE support arch: x86: Remove CONFIG_OPROFILE support arch: sparc: Remove CONFIG_OPROFILE support arch: sh: Remove CONFIG_OPROFILE support arch: s390: Remove CONFIG_OPROFILE support arch: powerpc: Remove oprofile arch: powerpc: Stop building and using oprofile arch: parisc: Remove CONFIG_OPROFILE support arch: mips: Remove CONFIG_OPROFILE support arch: microblaze: Remove CONFIG_OPROFILE support arch: ia64: Remove rest of perfmon support arch: ia64: Remove CONFIG_OPROFILE support arch: hexagon: Don't select HAVE_OPROFILE arch: arc: Remove CONFIG_OPROFILE support arch: arm: Remove CONFIG_OPROFILE support arch: alpha: Remove CONFIG_OPROFILE support
2021-02-21Merge branch 'work.elf-compat' of ↵Linus Torvalds7-275/+53
git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs Pull ELF compat updates from Al Viro: "Sanitizing ELF compat support, especially for triarch architectures: - X32 handling cleaned up - MIPS64 uses compat_binfmt_elf.c both for O32 and N32 now - Kconfig side of things regularized Eventually I hope to have compat_binfmt_elf.c killed, with both native and compat built from fs/binfmt_elf.c, with -DELF_BITS={64,32} passed by kbuild, but that's a separate story - not included here" * 'work.elf-compat' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: get rid of COMPAT_ELF_EXEC_PAGESIZE compat_binfmt_elf: don't bother with undef of ELF_ARCH Kconfig: regularize selection of CONFIG_BINFMT_ELF mips compat: switch to compat_binfmt_elf.c mips: don't bother with ELF_CORE_EFLAGS mips compat: don't bother with ELF_ET_DYN_BASE mips: KVM_GUEST makes no sense for 64bit builds... mips: kill unused definitions in binfmt_elf[on]32.c mips binfmt_elf*32.c: use elfcore-compat.h x32: make X32, !IA32_EMULATION setups able to execute x32 binaries [amd64] clean PRSTATUS_SIZE/SET_PR_FPVALID up properly elf_prstatus: collect the common part (everything before pr_reg) into a struct binfmt_elf: partially sanitize PRSTATUS_SIZE and SET_PR_FPVALID
2021-02-18Revert "MIPS: Add basic support for ptrace single step"Thomas Bogendoerfer4-116/+1
This reverts commit 7c86ff9925cbc83e8a21f164a8fdc2767e03531e. There are too many special cases for MIPS not covered by this patch. In the end it might be better to implement single stepping in userland than emulating it in the kernel. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-15MIPS: kernel: Drop kgdb_call_nmi_hookThomas Bogendoerfer1-5/+0
With the removal of set_fs() calls kgdb_call_nmi_hook() is now the same as the default implementation, so we can remove it. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-13MIPS: Use common way to parse elfcorehdrJinyang He1-28/+21
"elfcorehdr" can be parsed at kernel/crash_dump.c Signed-off-by: Jinyang He <hejinyang@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-13MIPS: Simplify EVA cache handlingThomas Bogendoerfer1-56/+11
protected_cache_op is only used for flushing user addresses, so we only need to define protected_cache_op different in EVA mode and be done with it. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-13Revert "MIPS: kernel: {ftrace,kgdb}: Set correct address limit for cache ↵Thomas Bogendoerfer2-21/+1
flushes" This reverts commit 6ebda44f366478d1eea180d93154e7d97b591f50. All icache flushes in this code paths are done via flush_icache_range(), which only uses normal cache instruction. And this is the correct thing for EVA mode, too. So no need to do set_fs(KERNEL_DS) here. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Reviewed-by: Christoph Hellwig <hch@lst.de>
2021-02-13MIPS: remove CONFIG_DMA_PERDEV_COHERENTChristoph Hellwig2-2/+3
Just select DMA_NONCOHERENT and ARCH_HAS_SETUP_DMA_OPS from the MIPS_GENERIC platform instead. Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Huacai Chen <chenhuacai@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-13MIPS: remove CONFIG_DMA_MAYBE_COHERENTChristoph Hellwig2-7/+3
CONFIG_DMA_MAYBE_COHERENT just guards two early init options now. Just enable them unconditionally for CONFIG_DMA_NONCOHERENT. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-13driver core: lift dma_default_coherent into common codeChristoph Hellwig9-33/+4
Lift the dma_default_coherent variable from the mips architecture code to the driver core. This allows an architecture to sdefault all device to be DMA coherent at run time, even if the kernel is build with support for DMA noncoherent device. By allowing device_initialize to set the ->dma_coherent field to this default the amount of arch hooks required for this behavior can be greatly reduced. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-13MIPS: refactor the runtime coherent vs noncoherent DMA indicatorsChristoph Hellwig6-40/+16
Replace the global coherentio enum, and the hw_coherentio (fake) boolean variables with a single boolean dma_default_coherent flag. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-13MIPS/alchemy: factor out the DMA coherent setupChristoph Hellwig1-14/+19
Factor out a alchemy_dma_coherent helper that determines if the platform is DMA coherent. Also stop initializing the hw_coherentio variable, given that is only ever set to a non-zero value by the malta setup code. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-13MIPS/malta: simplify plat_setup_iocoherencyChristoph Hellwig1-23/+9
Given that plat_mem_setup runs before earlyparams are handled and malta selects CONFIG_DMA_MAYBE_COHERENT, coherentio can only be set to IO_COHERENCE_DEFAULT at this point. So remove the checking for other options and merge plat_enable_iocoherency into plat_setup_iocoherency to simplify the code a bit. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-13MIPS: Add basic support for ptrace single stepTiezhu Yang4-1/+116
In the current code, arch_has_single_step() is not defined on MIPS, that means MIPS does not support instruction single-step for user mode. Delve is a debugger for the Go programming language, the ptrace syscall PtraceSingleStep() failed [1] on MIPS and then the single step function can not work well, we can see that PtraceSingleStep() definition returns ptrace(PTRACE_SINGLESTEP) [2]. So it is necessary to support ptrace single step on MIPS. At the beginning, we try to use the Debug Single Step exception on the Loongson 3A4000 platform, but it has no effect when set CP0_DEBUG SSt bit, this is because CP0_DEBUG NoSSt bit is 1 which indicates no single-step feature available [3], so this way which is dependent on the hardware is almost impossible. With further research, we find out there exists a common way used with break instruction in arch/alpha/kernel/ptrace.c, it is workable. For the above analysis, define arch_has_single_step(), add the common function user_enable_single_step() and user_disable_single_step(), set flag TIF_SINGLESTEP for child process, use break instruction to set breakpoint. We can use the following testcase to test it: tools/testing/selftests/breakpoints/step_after_suspend_test.c $ make -C tools/testing/selftests TARGETS=breakpoints $ cd tools/testing/selftests/breakpoints Without this patch: $ ./step_after_suspend_test -n TAP version 13 1..4 # ptrace(PTRACE_SINGLESTEP) not supported on this architecture: Input/output error ok 1 # SKIP CPU 0 # ptrace(PTRACE_SINGLESTEP) not supported on this architecture: Input/output error ok 2 # SKIP CPU 1 # ptrace(PTRACE_SINGLESTEP) not supported on this architecture: Input/output error ok 3 # SKIP CPU 2 # ptrace(PTRACE_SINGLESTEP) not supported on this architecture: Input/output error ok 4 # SKIP CPU 3 # Totals: pass:0 fail:0 xfail:0 xpass:0 skip:4 error:0 With this patch: $ ./step_after_suspend_test -n TAP version 13 1..4 ok 1 CPU 0 ok 2 CPU 1 ok 3 CPU 2 ok 4 CPU 3 # Totals: pass:4 fail:0 xfail:0 xpass:0 skip:0 error:0 [1] https://github.com/go-delve/delve/blob/master/pkg/proc/native/threads_linux.go#L50 [2] https://github.com/go-delve/delve/blob/master/vendor/golang.org/x/sys/unix/syscall_linux.go#L1573 [3] http://www.t-es-t.hu/download/mips/md00047f.pdf Reported-by: Guoqi Chen <chenguoqi@loongson.cn> Signed-off-by: Xingxing Su <suxingxing@loongson.cn> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-12Merge tag 'kvmarm-5.12' of ↵Paolo Bonzini5-4/+25
git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm into HEAD KVM/arm64 updates for Linux 5.12 - Make the nVHE EL2 object relocatable, resulting in much more maintainable code - Handle concurrent translation faults hitting the same page in a more elegant way - Support for the standard TRNG hypervisor call - A bunch of small PMU/Debug fixes - Allow the disabling of symbol export from assembly code - Simplification of the early init hypercall handling
2021-02-11kbuild: LD_VERSION redenominationMasahiro Yamada2-2/+2
Commit ccbef1674a15 ("Kbuild, lto: add ld-version and ld-ifversion macros") introduced scripts/ld-version.sh for GCC LTO. At that time, this script handled 5 version fields because GCC LTO needed the downstream binutils. (https://lkml.org/lkml/2014/4/8/272) The code snippet from the submitted patch was as follows: # We need HJ Lu's Linux binutils because mainline binutils does not # support mixing assembler and LTO code in the same ld -r object. # XXX check if the gcc plugin ld is the expected one too # XXX some Fedora binutils should also support it. How to check for that? ifeq ($(call ld-ifversion,-ge,22710001,y),y) ... However, GCC LTO was not merged into the mainline after all. (https://lkml.org/lkml/2014/4/8/272) So, the 4th and 5th fields were never used, and finally removed by commit 0d61ed17dd30 ("ld-version: Drop the 4th and 5th version components"). Since then, the last 4-digits returned by this script is always zeros. Remove the meaningless last 4-digits. This makes the version format consistent with GCC_VERSION, CLANG_VERSION, LLD_VERSION. Signed-off-by: Masahiro Yamada <masahiroy@kernel.org> Acked-by: Will Deacon <will@kernel.org> Acked-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-11locking/arch: Move qrwlock.h include after qspinlock.hWaiman Long1-1/+1
include/asm-generic/qrwlock.h was trying to get arch_spin_is_locked via asm-generic/qspinlock.h. However, this does not work because architectures might be using queued rwlocks but not queued spinlocks (csky), or because they might be defining their own queued_* macros before including asm/qspinlock.h. To fix this, ensure that asm/spinlock.h always includes qrwlock.h after defining arch_spin_is_locked (either directly for csky, or via asm/qspinlock.h for other architectures). The only inclusion elsewhere is in kernel/locking/qrwlock.c. That one is really unnecessary because the file is only compiled in SMP configurations (config QUEUED_RWLOCKS depends on SMP) and in that case linux/spinlock.h already includes asm/qrwlock.h if needed, via asm/spinlock.h. Reported-by: Guenter Roeck <linux@roeck-us.net> Signed-off-by: Waiman Long <longman@redhat.com> Fixes: 26128cb6c7e6 ("locking/rwlocks: Add contention detection for rwlocks") Tested-by: Guenter Roeck <linux@roeck-us.net> Reviewed-by: Ben Gardon <bgardon@google.com> [Add arch/sparc and kernel/locking parts per discussion with Waiman. - Paolo] Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-02-11MIPS: Make check condition for SDBBP consistent with EJTAG specTiezhu Yang2-2/+6
According to MIPS EJTAG Specification [1], a Debug Breakpoint exception occurs when an SDBBP instruction is executed, the CP0_DEBUG bit DBp indicates that a Debug Breakpoint exception occurred. When I read the original code, it looks a little confusing at first glance, just check bit DBp for SDBBP to make the code more readable, it will be much easier to understand. [1] http://www.t-es-t.hu/download/mips/md00047f.pdf Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-11mips: Replace lkml.org links with loreKees Cook1-6/+5
As started by commit 05a5f51ca566 ("Documentation: Replace lkml.org links with lore"), replace lkml.org links with lore to better use a single source that's more likely to stay available long-term. Signed-off-by: Kees Cook <keescook@chromium.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-09Revert "MIPS: microMIPS: Fix the judgment of mm_jr16_op and mm_jalr_op"Thomas Bogendoerfer1-3/+3
This reverts commit 9308579fef3ddde19da9d45e23bf36d41932417f. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-09KVM: Raise the maximum number of user memslotsVitaly Kuznetsov1-1/+0
Current KVM_USER_MEM_SLOTS limits are arch specific (512 on Power, 509 on x86, 32 on s390, 16 on MIPS) but they don't really need to be. Memory slots are allocated dynamically in KVM when added so the only real limitation is 'id_to_index' array which is 'short'. We don't have any other KVM_MEM_SLOTS_NUM/KVM_USER_MEM_SLOTS-sized statically defined structures. Low KVM_USER_MEM_SLOTS can be a limiting factor for some configurations. In particular, when QEMU tries to start a Windows guest with Hyper-V SynIC enabled and e.g. 256 vCPUs the limit is hit as SynIC requires two pages per vCPU and the guest is free to pick any GFN for each of them, this fragments memslots as QEMU wants to have a separate memslot for each of these pages (which are supposed to act as 'overlay' pages). Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com> Message-Id: <20210127175731.2020089-3-vkuznets@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2021-02-09MIPS: crash_dump.c: Simplify copy_oldmem_page()Youling Tang1-35/+6
Replace kmap_atomic_pfn() with kmap_local_pfn() which is preemptible and can take page faults. Remove the indirection of the dump page and the related cruft which is not longer required. Remove unused or redundant header files. Signed-off-by: Youling Tang <tangyouling@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-09Revert "mips: Manually call fdt_init_reserved_mem() method"Serge Semin1-3/+0
This reverts commit 3751cbda8f223549d7ea28803cbec8ac87e43ed2. Originally the patch was created to fix the reserved-memory DT-node parsing failure on the early stages of the platform memory initialization. That happened due to the two early memory allocators utilization that time: bootmem and memblock. At first the platform-specific memory mapping array was initialized. Then the early_init_fdt_scan_reserved_mem() was called, which couldn't fully parse the "reserved-memory" DT-node since neither memblock nor bootmem allocators hadn't been initialized at that stage, so the fdt_init_reserved_mem() method failed on the memory allocation calls. Only after that the platform-specific memory mapping were used to create proper bootmem and memblock structures and let the early memory allocations work. That's why we had to call the fdt_init_reserved_mem() method one more time to retry the initialization of the features like CMA. The necessity to have that fix was disappeared after the full memblock support had been added to the MIPS kernel and all plat_mem_setup() had been fixed to add the memory regions right into the memblock memory pool. Let's revert that patch then especially after having Paul reported that the second fdt_init_reserved_mem() call causes the reserved memory pool being created twice bigger than implied. Fixes: a94e4f24ec83 ("MIPS: init: Drop boot_mem_map") Reported-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Serge Semin <Sergey.Semin@baikalelectronics.ru> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-09MIPS: process: Fix no previous prototype warningJinyang He1-0/+2
unwind_stack_by_address and unwind_stack need <asm/stacktrace.h>. arch_align_stack needs <asm/exec.h> link: https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org/thread/ZPL2RRA6RZKRQZI5IGOVLFXN2GVZBN3L/ Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Jinyang He <hejinyang@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-09MIPS: compressed: fix build with enabled UBSANAlexander Lobakin1-0/+1
Commit 1e35918ad9d1 ("MIPS: Enable Undefined Behavior Sanitizer UBSAN") added a possibility to build the entire kernel with UBSAN instrumentation for MIPS, with the exception for VDSO. However, self-extracting head wasn't been added to exceptions, so this occurs: mips-alpine-linux-musl-ld: arch/mips/boot/compressed/decompress.o: in function `FSE_buildDTable_wksp': decompress.c:(.text.FSE_buildDTable_wksp+0x278): undefined reference to `__ubsan_handle_shift_out_of_bounds' mips-alpine-linux-musl-ld: decompress.c:(.text.FSE_buildDTable_wksp+0x2a8): undefined reference to `__ubsan_handle_shift_out_of_bounds' mips-alpine-linux-musl-ld: decompress.c:(.text.FSE_buildDTable_wksp+0x2c4): undefined reference to `__ubsan_handle_shift_out_of_bounds' mips-alpine-linux-musl-ld: arch/mips/boot/compressed/decompress.o: decompress.c:(.text.FSE_buildDTable_raw+0x9c): more undefined references to `__ubsan_handle_shift_out_of_bounds' follow Add UBSAN_SANITIZE := n to mips/boot/compressed/Makefile to exclude it from instrumentation scope and fix this issue. Fixes: 1e35918ad9d1 ("MIPS: Enable Undefined Behavior Sanitizer UBSAN") Cc: stable@vger.kernel.org # 5.0+ Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-09MIPS: relocatable: Use __kaslr_offset in show_kernel_relocationJinyang He1-6/+2
The type of the VMLINUX_LOAD_ADDRESS macro is the (unsigned long long) in 32bits kernel but (unsigned long) in the 64-bit kernel. Although there is no error here, avoid using it to calculate kaslr_offset. Signed-off-by: Jinyang He <hejinyang@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-09MIPS: relocatable: Provide kaslr_offset() to get the kernel offsetJinyang He3-0/+19
Provide kaslr_offset() to get the kernel offset when KASLR is enabled. Error may occur before update_kaslr_offset(), so put it at the end of the offset branch. Fixes: a307a4ce9ecd ("MIPS: Loongson64: Add KASLR support") Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Jinyang He <hejinyang@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-08module: remove EXPORT_UNUSED_SYMBOL*Christoph Hellwig2-2/+0
EXPORT_UNUSED_SYMBOL* is not actually used anywhere. Remove the unused functionality as we generally just remove unused code anyway. Reviewed-by: Miroslav Benes <mbenes@suse.cz> Reviewed-by: Emil Velikov <emil.l.velikov@gmail.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Jessica Yu <jeyu@kernel.org>
2021-02-04MIPS: kernel: Support extracting off-line stack traces from user-space with perfTiezhu Yang4-1/+111
Add perf_event_mips_regs/perf_reg_value/perf_reg_validate to support features HAVE_PERF_REGS/HAVE_PERF_USER_STACK_DUMP in kernel. [ayan@wavecomp.com: Repick this patch for unwinding userstack backtrace by perf and libunwind on MIPS based CPU.] [ralf@linux-mips.org: Add perf_get_regs_user() which is required after 'commit 88a7c26af8da ("perf: Move task_pt_regs sampling into arch code")'.] [yangtiezhu@loongson.cn: Fix build error about perf_get_regs_user() after commit 76a4efa80900 ("perf/arch: Remove perf_sample_data::regs_user_copy"), and also separate the original patches into two parts (MIPS kernel and perf tools) to merge easily.] The original patches: https://lore.kernel.org/patchwork/patch/1126521/ https://lore.kernel.org/patchwork/patch/1126520/ Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Archer Yan <ayan@wavecomp.com> Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-04MIPS: pistachio: remove obsolete include/asm/mach-pistachioAlexander Lobakin2-17/+0
Since commit 02bd530f888c ("MIPS: generic: Increase NR_IRQS to 256") include/asm/mach-pistachio/irq.h just does nothing. Remove the file along with mach-pistachio folder and include compiler directive. Signed-off-by: Alexander Lobakin <alobakin@pm.me> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-04mips: dts: Add support for Cisco SG220-26 switchBert Vermeulen2-0/+27
Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-04MIPS: Add Realtek RTL838x/RTL839x support as generic MIPS systemBert Vermeulen1-0/+21
This is just enough system to boot the kernel with earlycon working. Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-04Add support for Realtek RTL838x/RTL839x switch SoCsBert Vermeulen3-0/+81
The RTL838x/839x family of SoCs are Realtek switches with an embedded MIPS core. * RTL838x - 500MHz 4kce single core - 1Gbit ports and L2 features * RTL839x - 700MHz 34Kc single core - 1Gbit ports and L2 features These switches, depending on the exact part number, will have anywhere between 8 and 52 ports. The MIPS core is wired to a switch cpu port which has a tagging feature allowing us to make use of the DSA subsystem. The SoCs are somewhat basic in certain areas, getting better with more advanced features on newer series. The switch functionality is MMIO-mapped via a large MFD region. The SoCs have the following peripherals * ethernet * switch * uart - ns16550a * spi-flash interface * gpio * wdt * led The code was derived from various vendor SDKs based on Linux v2.6 kernels. This patchset allows us to boot RTL838x/RTL839x units with basic support. Most of the other drivers are already written and functional, and work to get them upstream is already in progress. Signed-off-by: Birger Koblitz <mail@birger-koblitz.de> Signed-off-by: Bert Vermeulen <bert@biot.com> Signed-off-by: John Crispin <john@phrozen.org> Signed-off-by: Sander Vanheule <sander@svanheule.net> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-04MIPS: ralink: manage low reset linesSander Vanheule1-2/+2
Reset lines with indices smaller than 8 are currently considered invalid by the rt2880-reset reset controller. The MT7621 SoC uses a number of these low reset lines. The DTS defines reset lines "hsdma", "fe", and "mcm" with respective values 5, 6, and 2. As a result of the above restriction, these resets cannot be asserted or de-asserted by the reset controller. In cases where the bootloader does not de-assert these lines, this results in e.g. the MT7621's internal switch staying in reset. Change the reset controller to only ignore the system reset, so all reset lines with index greater than 0 are considered valid. Signed-off-by: Sander Vanheule <sander@svanheule.net> Acked-by: John Crispin <john@phrozen.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-04MIPS: of: Introduce helper function to get DTBThomas Bogendoerfer10-77/+39
Selection of the DTB to be used was burried in more or less readable code in head.S. Move this code into a inline helper function and use it. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Acked-by: Florian Fainelli <f.fainelli@gmail.com>
2021-02-03arch: mips: kernel: Fix two spelling in smp.cBhaskar Chowdhury1-3/+3
s/logcal/logical/ s/intercpu/inter-CPU/ Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by: Randy Dunlap <rdunlap@infradead.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-03MIPS: malta-time: remove unneeded semicolonYang Li1-1/+1
Eliminate the following coccicheck warning: ./arch/mips/mti-malta/malta-time.c:141:2-3: Unneeded semicolon Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-03KVM: MIPS: remove unneeded semicolonYang Li1-1/+1
Eliminate the following coccicheck warning: ./arch/mips/kvm/mips.c:151:2-3: Unneeded semicolon Reported-by: Abaci Robot <abaci@linux.alibaba.com> Signed-off-by: Yang Li <yang.lee@linux.alibaba.com> Reviewed-by: Huacai Chen <chenhuacai@kernel.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-02-03MIPS: fix kernel_stack_pointer()Huang Pei1-1/+1
MIPS always save kernel stack pointer in regs[29] Signed-off-by: Huang Pei <huangpei@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-29Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski1-0/+1
drivers/net/can/dev.c b552766c872f ("can: dev: prevent potential information leak in can_fill_info()") 3e77f70e7345 ("can: dev: move driver related infrastructure into separate subdir") 0a042c6ec991 ("can: dev: move netlink related code into seperate file") Code move. drivers/net/ethernet/mellanox/mlx5/core/en_ethtool.c 57ac4a31c483 ("net/mlx5e: Correctly handle changing the number of queues when the interface is down") 214baf22870c ("net/mlx5e: Support HTB offload") Adjacent code changes net/switchdev/switchdev.c 20776b465c0c ("net: switchdev: don't set port_obj_info->handled true when -EOPNOTSUPP") ffb68fc58e96 ("net: switchdev: remove the transaction structure from port object notifiers") bae33f2b5afe ("net: switchdev: remove the transaction structure from port attributes") Transaction parameter gets dropped otherwise keep the fix. Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-01-27MIPS: Fix inline asm input/output type mismatch in checksum.h used with ClangTiezhu Yang1-2/+4
Fix the following build error when make M=samples/bpf used with Clang: CLANG-bpf samples/bpf/sockex2_kern.o In file included from samples/bpf/sockex2_kern.c:7: In file included from ./include/uapi/linux/if_tunnel.h:7: In file included from ./include/linux/ip.h:16: In file included from ./include/linux/skbuff.h:28: In file included from ./include/net/checksum.h:22: ./arch/mips/include/asm/checksum.h:161:9: error: unsupported inline asm: input with type 'unsigned long' matching output with type '__wsum' (aka 'unsigned int') : "0" ((__force unsigned long)daddr), ^~~~~~~~~~~~~~~~~~~~~~~~~~~~ 1 error generated. This is a known issue on MIPS [1], the changed code can be compiled successfully by both GCC and Clang. [1] https://lore.kernel.org/linux-mips/CAG_fn=W0JHf8QyUX==+rQMp8PoULHrsQCa9Htffws31ga8k-iw@mail.gmail.com/ Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-27MIPS: mm:remove function __uncached_access()Yanteng Si1-8/+0
MIPS can now use the default uncached_access like other archs. Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Acked-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
2021-01-27MIPS: loongson2ef: remove function __uncached_access()Yanteng Si1-11/+0
We no longer need the MESA workaround, so remove it. Signed-off-by: Yanteng Si <siyanteng@loongson.cn> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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