| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2014-11-24 | MIPS: ralink: allow loading irq registers from the devicetree | John Crispin | 1 | -10/+25 |
| 2014-11-24 | MIPS: Add hook to get C0 performance counter interrupt | Andrew Bresticker | 1 | -1/+7 |
| 2014-11-24 | MIPS: Rename mips_cpu_intc_init() -> mips_cpu_irq_of_init() | Andrew Bresticker | 1 | -1/+1 |
| 2013-07-15 | MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code | Paul Gortmaker | 1 | -1/+1 |
| 2013-05-08 | MIPS: ralink: add missing comment in irq driver | John Crispin | 1 | -0/+1 |
| 2013-05-08 | MIPS: ralink: add PCI IRQ handling | Gabor Juhos | 1 | -0/+4 |
| 2013-02-17 | MIPS: ralink: add CPU interrupt controller to of_irq_ids | Gabor Juhos | 1 | -3/+7 |
| 2013-02-17 | MIPS: ralink: adds irq code | John Crispin | 1 | -0/+176 |
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index : starfive-tech/linux.git | |
| StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror) | Andrey V.Kosteltsev |
| summaryrefslogtreecommitdiff |