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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
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mips
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mm
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sc-mips.c
Age
Commit message (
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Author
Files
Lines
2020-12-14
mips: fix Section mismatch in reference
Anders Roxell
1
-2
/
+2
2020-09-27
MIPS: Ingenic: Fix bugs when detecting L2 cache of JZ4775 and X1000E.
周琰杰 (Zhou Yanjie)
1
-0
/
+2
2020-06-09
mm: don't include asm/pgtable.h if linux/mm.h is already included
Mike Rapoport
1
-1
/
+0
2020-05-22
mips: Add MIPS Release 5 support
Serge Semin
1
-3
/
+4
2019-08-06
MIPS: Ingenic: Fix bugs when detecting X1000's L2 cache.
Zhou Yanjie
1
-7
/
+20
2019-07-22
MIPS: Rename JZRISC to XBURST
Paul Cercueil
1
-1
/
+1
2018-01-19
MIPS: JZ4770: Work around config2 misreporting associativity
Maarten ter Huurne
1
-0
/
+9
2017-11-02
License cleanup: add SPDX GPL-2.0 license identifier to files with no license
Greg Kroah-Hartman
1
-0
/
+1
2017-08-30
MIPS: CPS: Have asm/mips-cps.h include CM & CPC headers
Paul Burton
1
-1
/
+1
2017-08-30
MIPS: CPS: Use change_*, set_* & clear_* where appropriate
Paul Burton
1
-14
/
+5
2017-08-29
MIPS: CM: Use BIT/GENMASK for register fields, order & drop shifts
Paul Burton
1
-18
/
+18
2017-01-03
MIPS: sc-mips: L2 cache is inclusive of L1 dcache for CM3
Paul Burton
1
-0
/
+1
2016-05-13
MIPS: Add P6600 cases to CPU switch statements
Paul Burton
1
-0
/
+1
2016-02-29
MIPS: scache: Fix scache init with invalid line size.
Govindraj Raja
1
-4
/
+9
2016-02-09
MIPS: Fix early CM probing
Paul Burton
1
-10
/
+0
2015-10-26
MIPS: Enable L2 prefetching for CM >= 2.5
Paul Burton
1
-1
/
+60
2015-10-26
MIPS: Remove invalid check
Andrzej Hajda
1
-2
/
+2
2015-08-26
MIPS: Add platform callback before initializing the L2 cache
Markos Chandras
1
-0
/
+10
2015-08-26
MIPS: CM3: Add support for CM3 L2 cache.
Paul Burton
1
-0
/
+32
2015-02-17
MIPS: mm: scache: Add secondary cache support for MIPS R6 cores
Markos Chandras
1
-1
/
+2
2015-02-16
MIPS: Add cases for CPU_QEMU_GENERIC
Leonid Yegoshin
1
-0
/
+1
2014-03-27
MIPS: Add cases for CPU_P5600
James Hogan
1
-0
/
+1
2014-03-07
MIPS: Add 1074K CPU support explicitly.
Steven J. Hill
1
-0
/
+1
2014-01-22
MIPS: Add support for interAptiv cores
Leonid Yegoshin
1
-0
/
+1
2014-01-22
MIPS: Add support for the proAptiv cores
Leonid Yegoshin
1
-0
/
+1
2013-09-17
MIPS: Optimize current_cpu_type() for better code.
Ralf Baechle
1
-1
/
+2
2013-07-15
MIPS: Delete __cpuinit/__CPUINIT usage from MIPS code
Paul Gortmaker
1
-1
/
+1
2013-04-05
MIPS: Fix ISA level which causes secondary cache init bypassing and more
Deng-Cheng Zhu
1
-4
/
+2
2012-03-28
Disintegrate asm/system.h for MIPS
David Howells
1
-1
/
+0
2010-12-17
MIPS: Fix build errors in sc-mips.c
Kevin Cernekee
1
-0
/
+4
2010-10-29
MIPS: Honor L2 bypass bit
Kevin Cernekee
1
-4
/
+30
2009-09-30
MIPS: MIPSxx SC: Avoid destructive invalidation on partial L2 cachelines.
Kevin Cernekee
1
-0
/
+5
2008-03-12
[MIPS] Fix loads of section missmatches
Ralf Baechle
1
-2
/
+1
2007-10-12
[MIPS] Fix "no space between function name and open parenthesis" warnings.
Ralf Baechle
1
-1
/
+1
2006-06-30
[MIPS] MIPS32/MIPS64 S-cache fix and cleanup
Atsushi Nemoto
1
-32
/
+3
2006-06-30
[MIPS] MIPS32/MIPS64 secondary cache management
Chris Dearman
1
-0
/
+141