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path: root/arch/mips/mm/c-sb1.c
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2007-10-12[MIPS] Sibyte: Replace SB1 cachecode with standard R4000 class cache code.Ralf Baechle1-535/+0
It may not be perfect yet but the SB1 code is badly borken and has horrible performance issues. Downside: This seriously breaks support for pass 1 parts of the BCM1250 where indexed cacheops don't work quite reliable but I seem to be the last one on the planet with a pass 1 part anyway. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-24[MIPS] Replace __attribute_used__ with __usedDavid Rientjes1-1/+1
Replaces the deprecated __attribute_used__ with __used. Also makes some style adjustments to abide by the kernel coding conventions. Cc: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: David Rientjes <rientjes@google.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-07-10[MIPS] SB1: Fix modpost warning.Ralf Baechle1-1/+1
MODPOST vmlinux WARNING: arch/mips/mm/built-in.o(.text+0x1978): Section mismatch: reference to .init.text:except_vec2_sb1 (between 'sb1_cache_init' and 'sb1_flush_cache_sigtramp') WARNING: arch/mips/mm/built-in.o(.text+0x1988): Section mismatch: reference to .init.text:except_vec2_sb1 (between 'sb1_cache_init' and 'sb1_flush_cache_sigtramp') Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-02-14[MIPS] Fix uniprocessor Sibyte builds.Andrew Sharp1-0/+6
Signed-off-by: Andrew Sharp <tigerand@gmail.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-23[MIPS] Hack for SB1 cache issuesThiemo Seufer1-1/+21
Removing flush_icache_page a while ago broke SB1 which was using an empty flush_data_cache_page function. This glues things well enough so a more efficient but also more intrusive solution can be found later. Signed-Off-By: Thiemo Seufer <ths@networkno.de> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-11-06[MIPS] SB1: On bootup only flush cache on local CPU.Ralf Baechle1-1/+1
This fixes a warning on bootup warning in smp_call_function. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-31[MIPS] Make SB1 cache flushes not to use on_each_cpuManish Lachwani1-4/+13
This fixes the start_kernel(): bug: interrupts were enabled early messages. Signed-off-by: Manish Lachwani <mlachwani@mvista.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-31[MIPS] Fix warning about unused definition in c-sb1.cYoichi Yuasa1-1/+0
arch/mips/mm/c-sb1.c: In function `sb1_cache_init': arch/mips/mm/c-sb1.c:447: warning: unused variable `handle_vec2_sb1' Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-10-02[MIPS] Remove __flush_icache_pageAtsushi Nemoto1-61/+0
__flash_icache_page is unused, so kill it. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Do not use drop_mmu_context to flusing other task's VIPT I-cache.Atsushi Nemoto1-25/+31
c-r4k.c and c-sb1.c use drop_mmu_context() to flush virtually tagged I-caches, but this does not work for flushing other task's icache. This is for example triggered by copy_to_user_page() called from ptrace(2). Use indexed flush for such cases. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2006-09-27[MIPS] Retire flush_icache_page from mm use.Ralf Baechle1-1/+1
On the 34K the redundant cache operations were causing excessive stalls resulting in realtime code running on the second VPE missing its deadline. For all other platforms this patch is just a significant performance improvment as illustrated by below benchmark numbers. Processor, Processes - times in microseconds - smaller is better ------------------------------------------------------------------------------ Host OS Mhz null null open slct sig sig fork exec sh call I/O stat clos TCP inst hndl proc proc proc --------- ------------- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- ---- 25Kf 2.6.18-rc4 533 0.49 1.16 7.57 33.4 30.5 1.34 12.4 5497 17.K 54.K 25Kf 2.6.18-rc4-p 533 0.49 1.16 6.68 23.0 30.7 1.36 8.55 5030 16.K 48.K 4Kc 2.6.18-rc4 80 4.21 15.0 131. 289. 261. 16.5 258. 18.K 70.K 227K 4Kc 2.6.18-rc4-p 80 4.34 13.1 128. 285. 262. 18.2 258. 12.K 52.K 176K 34Kc 2.6.18-rc4 40 5.01 14.0 61.6 90.0 477. 17.9 94.7 29.K 108K 342K 34Kc 2.6.18-rc4-p 40 4.98 13.9 61.2 89.7 475. 17.6 93.7 8758 44.K 158K BCM1480 2.6.18-rc4 700 0.28 0.60 3.68 5.92 16.0 0.78 5.08 931. 3163 15.K BCM1480 2.6.18-rc4-p 700 0.28 0.61 3.65 5.85 16.0 0.79 5.20 395. 1464 8385 TX49-16K 2.6.18-rc3 197 0.73 2.41 19.0 37.8 82.9 2.94 17.5 4438 14.K 56.K TX49-16K 2.6.18-rc3-p 197 0.73 2.40 19.9 36.3 82.9 2.94 23.4 2577 9103 38.K TX49-32K 2.6.18-rc3 396 0.36 1.19 6.80 11.8 41.0 1.46 8.17 2738 8465 32.K TX49-32K 2.6.18-rc3-p 396 0.36 1.19 6.82 10.2 41.0 1.46 8.18 1330 4638 18.K Original patch by me with enhancements by Atsushi Nemoto. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp>
2006-06-30Remove obsolete #include <linux/config.h>Jörn Engel1-1/+0
Signed-off-by: Jörn Engel <joern@wohnheim.fh-wedel.de> Signed-off-by: Adrian Bunk <bunk@stusta.de>
2006-04-19[MIPS] Handle IDE PIO cache aliases on SMP.Ralf Baechle1-0/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Don't copy SB1 cache error handler to uncached memory.Ralf Baechle1-1/+0
This may have made sense on a paranoid day with pass 1 BCM1250 processors that were throwing cache error exception left and right for no good reason. On modern silicion that hardly makes sense and the code had gotten just an obscurity ... Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Fix stale comment in c-sb1.c.Andrew Isaacson1-1/+1
Signed-Off-By: Andrew Isaacson <adi@broadcom.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Cleanup the mess in cpu_cache_init.Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29More AP / SP bits for the 34K, the Malta bits and things. Still wantsRalf Baechle1-3/+2
a little polishing. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-10-29Gcc 4.0 fixes.Ralf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2005-09-05[PATCH] mips: nuke trailing whitespaceRalf Baechle1-1/+1
Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
2005-04-17Linux-2.6.12-rc2Linus Torvalds1-0/+558
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!