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starfive-tech/linux.git
JH7100_VisionFive_OH_dev
JH7110_VisionFive2_510_devel
JH7110_VisionFive2_6.1.y_devel
JH7110_VisionFive2_6.12.y_devel
JH7110_VisionFive2_6.6.y_devel
JH7110_VisionFive2_devel
JH7110_VisionFive2_upstream
beaglev-5.13.y
beaglev_fedora_devel
buildroot-upstream
esmil_starlight
fedora-vic-7100_5.10.6
master
openwrt-6.1.y
pinetabv-6.6.y-devel
rt-ethercat-release
rt-linux-6.6.y-release
rt-linux-release
rtthread_AMP
starfive-5.13
starfive-5.15-dubhe
starfive-6.1-dubhe
starfive-6.1.65-dubhe
starfive-6.6.10-dubhe
starfive-6.6.31-dubhe
starfive-6.6.48-dubhe
starfive-6.6.63-dubhe
starlight-5.14.y
visionfive
visionfive-5.13.y-devel
visionfive-5.15.y
visionfive-5.15.y-devel
visionfive-5.15.y_fedora_devel
visionfive-5.16.y
visionfive-5.17.y
visionfive-5.18.y
visionfive-5.19.y
visionfive-6.4.y
visionfive_fedora_devel
StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)
Andrey V.Kosteltsev
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path:
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arch
/
mips
/
mm
/
c-r4k.c
Age
Commit message (
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)
Author
Files
Lines
2006-03-18
[MIPS] local_r4k_flush_cache_page fix
Atsushi Nemoto
1
-4
/
+9
2006-02-28
[MIPS] Initialize S-cache function pointers even on S-cache-less CPUs.
Ralf Baechle
1
-5
/
+11
2006-02-14
[MIPS] Add protected_blast_icache_range, blast_icache_range, etc.
Atsushi Nemoto
1
-90
/
+14
2006-02-07
[MIPS] Remove wrong __user tags.
Atsushi Nemoto
1
-4
/
+3
2006-01-10
MIPS: Rename MIPS_CPU_ISA_M{32,64} -> MIPS_CPU_ISA_M{32,64}R1.
Ralf Baechle
1
-2
/
+2
2005-10-29
Rename page argument of flush_cache_page to something more descriptive.
Ralf Baechle
1
-16
/
+17
2005-10-29
Cleanup the mess in cpu_cache_init.
Ralf Baechle
1
-1
/
+1
2005-10-29
Add/Fix missing bit of R4600 hit cacheop workaround.
Thiemo Seufer
1
-0
/
+1
2005-10-29
Minor code cleanup.
Thiemo Seufer
1
-15
/
+15
2005-10-29
More .set push/pop.
Thiemo Seufer
1
-2
/
+2
2005-10-29
Let r4600 PRID detection match only legacy CPUs, cleanups.
Thiemo Seufer
1
-2
/
+2
2005-10-29
Avoid SMP cacheflushes. This is a minor optimization of startup but
Ralf Baechle
1
-3
/
+2
2005-10-29
More AP / SP bits for the 34K, the Malta bits and things. Still wants
Ralf Baechle
1
-2
/
+1
2005-10-29
Mark a few variables __read_mostly.
Ralf Baechle
1
-1
/
+7
2005-10-29
MIPS R2 instruction hazard handling.
Ralf Baechle
1
-0
/
+1
2005-10-29
Better interface to run uncached cache setup code.
Thiemo Seufer
1
-4
/
+2
2005-10-29
Sparseify MIPS.
Ralf Baechle
1
-3
/
+4
2005-10-29
Base Au1200 2.6 support.
Pete Popov
1
-0
/
+4
2005-10-29
Use intermediate variable.
Thiemo Seufer
1
-3
/
+3
2005-10-29
Moves a test which determines if we actually need to perform a
Ralf Baechle
1
-7
/
+7
2005-10-29
Update MIPS to use the 4-level pagetable code thereby getting rid of
Ralf Baechle
1
-1
/
+3
2005-10-29
25Kf is also physically indexed.
Ralf Baechle
1
-0
/
+1
2005-10-29
20Kc and SB1 don't suffer from aliases.
Ralf Baechle
1
-0
/
+2
2005-10-29
Move missplaced code line to the right place.
Ralf Baechle
1
-3
/
+2
2005-10-29
Use hardware mechanism to deal with cache aliases in the 24K.
Ralf Baechle
1
-2
/
+10
2005-10-29
Remove old wrong bits of cache code.
Ralf Baechle
1
-3
/
+0
2005-09-05
[PATCH] mips: nuke trailing whitespace
Ralf Baechle
1
-8
/
+8
2005-09-05
[PATCH] mips: clean up 32/64-bit configuration
Ralf Baechle
1
-2
/
+2
2005-04-17
Linux-2.6.12-rc2
Linus Torvalds
1
-0
/
+1260
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