| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2015-03-31 | MIPS: perf: Allow sharing IRQ with timer | James Hogan | 1 | -3/+5 |
| 2015-03-31 | MIPS: cevt-r4k: Cleanup c0_compare_interrupt. | Ralf Baechle | 1 | -5/+4 |
| 2015-03-31 | MIPS: cevt-r4k: Make interrupt handler shared | James Hogan | 1 | -1/+7 |
| 2015-03-31 | MIPS: Remove redundant IPTI==IPPCI logic | James Hogan | 1 | -2/+1 |
| 2015-03-31 | MIPS: cevt-r4k: Use CAUSEF_TI, CAUSEF_PCI constants | James Hogan | 1 | -1/+1 |
| 2015-03-31 | MIPS: cevt-r4k: Move handle_perf_irq() out of header | James Hogan | 1 | -0/+18 |
| 2015-03-28 | MIPS: KVM: Add base guest MSA support | James Hogan | 1 | -0/+1 |
| 2015-03-28 | MIPS: KVM: Add base guest FPU support | James Hogan | 1 | -0/+38 |
| 2015-03-28 | MIPS: Clear [MSA]FPE CSR.Cause after notify_die() | James Hogan | 2 | -11/+19 |
| 2015-03-27 | Revert "MIPS: Don't assume 64-bit FP registers for context switch" | James Hogan | 1 | -66/+0 |
| 2015-03-27 | MIPS: prevent FP context set via ptrace being discarded | Paul Burton | 1 | -6/+24 |
| 2015-03-27 | MIPS: Ensure FCSR cause bits are clear after invoking FPU emulator | Paul Burton | 1 | -8/+9 |
| 2015-03-27 | MIPS: clear MSACSR cause bits when handling MSA FP exception | Paul Burton | 1 | -1/+10 |
| 2015-03-27 | MIPS: Push .set mips64r* into the functions needing it | Paul Burton | 1 | -1/+1 |
| 2015-03-24 | mips: copy_thread(): rename 'arg' argument to 'kthread_arg' | Alex Dowad | 1 | -2/+8 |
| 2015-03-19 | MIPS: Add support for XPA. | Steven J. Hill | 2 | -0/+5 |
| 2015-03-05 | mips: fix up obsolete cpu function usage. | Rusty Russell | 9 | -30/+30 |
| 2015-02-22 | Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus | Linus Torvalds | 22 | -281/+3598 |
| 2015-02-20 | MIPS: OCTEON: Delete unused COP2 saving code | Aleksey Makarov | 1 | -26/+0 |
| 2015-02-20 | MIPS: OCTEON: Use correct instruction to read 64-bit COP0 register | Chandrakala Chavva | 1 | -3/+3 |
| 2015-02-20 | MIPS: OCTEON: Save and restore CP2 SHA3 state | David Daney | 2 | -11/+33 |
| 2015-02-20 | MIPS: OCTEON: Fix FP context save. | David Daney | 1 | -12/+7 |
| 2015-02-20 | MIPS: OCTEON: Save/Restore wider multiply registers in OCTEON III CPUs | David Daney | 1 | -30/+98 |
| 2015-02-20 | MIPS: Add set/clear CP0 macros for PageGrain register | Steven J. Hill | 1 | -1/+1 |
| 2015-02-19 | Merge branch 'mipsr6-for-3.20' of git://git.linux-mips.org/pub/scm/mchandras/... | Ralf Baechle | 21 | -195/+3334 |
| 2015-02-19 | MIPS: Export MSA functions used by lose_fpu(1) for KVM | James Hogan | 1 | -0/+4 |
| 2015-02-19 | MIPS: Export FP functions used by lose_fpu(1) for KVM | James Hogan | 1 | -0/+6 |
| 2015-02-17 | MIPS: kernel: elf: Improve the overall ABI and FPU mode checks | Markos Chandras | 1 | -115/+188 |
| 2015-02-17 | MIPS: kernel: process: Do not allow FR=0 on MIPS R6 | Markos Chandras | 1 | -0/+4 |
| 2015-02-17 | MIPS: Make use of the ERETNC instruction on MIPS R6 | Markos Chandras | 3 | -0/+21 |
| 2015-02-17 | MIPS: kernel: mips-r2-to-r6-emul: Add R2 emulator for MIPS R6 | Leonid Yegoshin | 4 | -1/+2407 |
| 2015-02-17 | MIPS: Add LLB bit and related feature for the Config 5 CP0 register | Markos Chandras | 1 | -0/+2 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 BNEZC and JIALC instructions | Markos Chandras | 1 | -0/+10 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 BEQZC and JIC instructions | Markos Chandras | 1 | -0/+8 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 BALC instruction | Markos Chandras | 1 | -0/+10 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 BNVC, BNEC and BNEZLAC instructions | Markos Chandras | 1 | -1/+5 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 BOVC, BEQC and BEQZALC instructions | Markos Chandras | 1 | -0/+11 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 branch compact (BC) instruction | Markos Chandras | 1 | -0/+9 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 B{L,G}T{Z,}{AL,}C instructions | Markos Chandras | 1 | -0/+22 |
| 2015-02-17 | MIPS: Emulate the new MIPS R6 B{L,G}Ε{Z,}{AL,}C instructions | Markos Chandras | 1 | -0/+31 |
| 2015-02-17 | MIPS: Emulate the BC1{EQ,NE}Z FPU instructions | Markos Chandras | 1 | -29/+72 |
| 2015-02-17 | MIPS: kernel: branch: Do not emulate the branch likelies on MIPS R6 | Markos Chandras | 1 | -7/+63 |
| 2015-02-17 | MIPS: kernel: Prepare the JR instruction for emulation on MIPS R6 | Markos Chandras | 1 | -2/+9 |
| 2015-02-17 | MIPS: kernel: syscall: Set the appropriate ISA level for MIPS R6 | Markos Chandras | 1 | -1/+1 |
| 2015-02-17 | MIPS: kernel: unaligned: Add support for the MIPS R6 | Leonid Yegoshin | 1 | -4/+386 |
| 2015-02-17 | MIPS: kernel: cps-vec: Replace "addi" with "addiu" | Markos Chandras | 1 | -8/+8 |
| 2015-02-17 | MIPS: kernel: genex: Set correct ISA level | Markos Chandras | 1 | -1/+1 |
| 2015-02-17 | MIPS: kernel: r4k_fpu: Add support for MIPS R6 | Leonid Yegoshin | 1 | -3/+9 |
| 2015-02-17 | MIPS: kernel: r4k_switch: Add support for MIPS R6 | Leonid Yegoshin | 1 | -6/+8 |
| 2015-02-17 | MIPS: kernel: traps: Add MIPS R6 related definitions | Leonid Yegoshin | 1 | -5/+5 |
