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2015-04-13Merge branch '4.0-fixes' into mips-for-linux-nextRalf Baechle5-110/+244
2015-04-13Merge branch '4.1-fp' into mips-for-linux-nextRalf Baechle4-74/+35
2015-04-12arch: Remove exec_domain from remaining archsRichard Weinberger1-1/+0
2015-04-10MIPS: smp-cps: cpu_set FPU mask if FPU presentNiklas Cassel1-0/+6
2015-04-10MIPS: kernel: entry.S: Set correct ISA level for mips_ihbMarkos Chandras1-1/+2
2015-04-10MIPS: unaligned: Fix regular load/store instruction emulation for EVAMarkos Chandras1-5/+47
2015-04-10MIPS: unaligned: Surround load/store macros in do {} while statementsMarkos Chandras1-26/+90
2015-04-10MIPS: unaligned: Prevent EVA instructions on kernel unaligned accessesMarkos Chandras1-78/+94
2015-04-08MIPS: Fix double inclusion of headers in misalignment emulator.Ralf Baechle1-2/+0
2015-04-08MIPS: Factor out FPU feature probingMaciej W. Rozycki1-54/+71
2015-04-08MIPS: Respect the ISA level in FCSR handlingMaciej W. Rozycki4-12/+65
2015-04-08MIPS: math-emu: Set FIR feature flags for full emulationMaciej W. Rozycki1-2/+23
2015-04-08MIPS: Correct ISA masking in FPU feature determinationMaciej W. Rozycki1-1/+3
2015-04-08MIPS: Set `si_code' for SIGFPE signals sent from emulation tooMaciej W. Rozycki3-70/+88
2015-04-08MIPS: Always clear FCSR cause bits after emulationMaciej W. Rozycki2-1/+20
2015-04-08MIPS: Respect the FCSR exception mask for `si_code'Maciej W. Rozycki1-1/+10
2015-04-08MIPS: Correct FP ISA requirementsMaciej W. Rozycki1-12/+11
2015-04-08MIPS: Fix BREAK code interpretation heuristicsMaciej W. Rozycki1-1/+1
2015-04-08MIPS: BREAK instruction interpretation correctionsMaciej W. Rozycki1-18/+18
2015-04-08MIPS: Correct MIPS16 BREAK code interpretationMaciej W. Rozycki1-1/+1
2015-04-08MIPS: Use `FPU_CSR_ALL_X' in `__build_clear_fpe'Maciej W. Rozycki1-1/+1
2015-04-08MIPS: Normalise code flow in the CpU exception handlerMaciej W. Rozycki1-8/+7
2015-04-08MIPS: Reindent R6 RI exception emulationMaciej W. Rozycki1-16/+15
2015-04-08MIPS: ELF: Drop `get_fp_abi'Maciej W. Rozycki1-12/+2
2015-04-08MIPS: Correct the comment for and reformat `movf_func'Maciej W. Rozycki1-1/+4
2015-04-08MIPS: Clarify the comment for `__cpu_has_fpu'Maciej W. Rozycki1-1/+1
2015-04-08MIPS: Correct the comment for FPU emulator trapsMaciej W. Rozycki1-3/+3
2015-04-01MIPS: perf: Add hardware perf events support for Loongson-3Huacai Chen1-0/+71
2015-04-01MIPS: Add R16000 detectionJoshua Kinard2-2/+8
2015-04-01MIPS: Provide fallback reboot/poweroff/halt implementationsAndrew Bresticker1-0/+25
2015-04-01MIPS: smp: Make stop_this_cpu() actually stop the CPUAndrew Bresticker1-4/+2
2015-04-01MIPS: LLVMLinux: Fix a 'cast to type not present in union' error.Toma Tabacu1-2/+4
2015-04-01MIPS: Let __dt_register_buses accept a single bus typeKevin Cernekee1-1/+4
2015-04-01MIPS: csrc-sb1250: Implement read_sched_clockDeng-Cheng Zhu1-0/+8
2015-04-01MIPS: csrc-sb1250: Remove FSF mail address from GPL noticeDeng-Cheng Zhu1-4/+0
2015-04-01MIPS: csrc-sb1250: Extract hpt cycle acquisition from sb1250_hpt_readDeng-Cheng Zhu1-2/+9
2015-04-01MIPS: cevt-txx9: Implement read_sched_clockDeng-Cheng Zhu1-0/+9
2015-04-01MIPS: csrc-ioasic: Implement read_sched_clockDeng-Cheng Zhu1-0/+9
2015-04-01MIPS: csrc-ioasic: Remove FSF mail address from GPL noticeDeng-Cheng Zhu1-4/+0
2015-04-01MIPS: csrc-bcm1480: Implement read_sched_clockDeng-Cheng Zhu1-0/+8
2015-04-01MIPS: csrc-bcm1480: Remove FSF mail address from GPL noticeDeng-Cheng Zhu1-4/+0
2015-04-01MIPS: csrc-r4k: Implement read_sched_clockDeng-Cheng Zhu1-0/+8
2015-03-31MIPS, ttyFDC: Add early FDC console supportJames Hogan1-0/+2
2015-03-31MIPS: idle: Workaround wait + FDC problemsJames Hogan1-2/+11
2015-03-31MIPS: Read CPU IRQ line that FDC to routed toJames Hogan1-0/+12
2015-03-31MIPS: Add arch CDMM definitions and probingJames Hogan1-0/+2
2015-03-31MIPS: Allow shared IRQ for timer & perf counterJames Hogan1-2/+0
2015-03-31MIPS: perf: Allow sharing IRQ with timerJames Hogan1-3/+5
2015-03-31MIPS: cevt-r4k: Cleanup c0_compare_interrupt.Ralf Baechle1-5/+4
2015-03-31MIPS: cevt-r4k: Make interrupt handler sharedJames Hogan1-1/+7