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2012-09-28MIPS: Fix module.c build for 32 bitRalf Baechle3-120/+147
Fixes build failure introduced by "Make most arch asm/module.h files use asm-generic/module.h" by moving all the RELA processing code to a separate file to be used only for RELA processing on 64-bit kernels. CC arch/mips/kernel/module.o arch/mips/kernel/module.c:250:14: error: 'reloc_handlers_rela' defined but not used [-Werror=unused-variable] cc1: all warnings being treated as errors make[6]: *** [arch/mips/kernel/module.o] Error 1 Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
2012-09-27Merge branch 'cn68xx-ciu2' of ↵Ralf Baechle3-26/+47
git://git.linux-mips.org/pub/scm/daney/upstream-daney into mips-for-linux-next
2012-09-26MIPS: Wire kcmp syscall.Ralf Baechle4-0/+4
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-09-22Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds1-1/+1
Pull MIPS fixes from Ralf Baechle: "Random fixes across arch/mips, essentially. One fix for an issue in get_user_pages_fast() which previously was discovered on x86, a miscalculation in the support for the MIPS MT hardware multithreading support, the RTC support for the Malta and a fix for a spurious interrupt issue that seems to bite only very special Malta configurations." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: MIPS: Malta: Don't crash on spurious interrupt. MIPS: Malta: Remove RTC Data Mode bootstrap breakage MIPS: mm: Add compound tail page _mapcount when mapped MIPS: CMP/SMTC: Fix tc_id calculation
2012-09-22MIPS: Merge the identical "return from syscall" per-ABI codeAl Viro5-51/+13
No need to keep 4 copies of that stuff; merged and taken to entry.S, unused public symbols there killed off. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-09-22MIPS: Prevent hitting do_notify_resume() with !user_mode(regs).Al Viro2-8/+3
Too late to do anything there... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-09-14MIPS: Add base architecture support for RI and XI.Steven J. Hill1-1/+5
Originally both Read Inhibit (RI) and Execute Inhibit (XI) were supported by the TLB only for a SmartMIPS core. The MIPSr3(TM) Architecture now defines an optional feature to implement these TLB bits separately. Support for one or both features can be checked by looking at the Config3.RXI bit. Signed-off-by: Steven J. Hill <sjhill@mips.com> Acked-by: David Daney <david.daney@cavium.com>
2012-09-14MIPS: Make VPE count to be one-based.Steven J. Hill1-0/+1
When dealing with multiple VPEs, the count needs to be one-based for correct initialization of the GIC. Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-09-14MIPS: Add new end of interrupt functionality for GIC.Steven J. Hill1-1/+1
Each platform should define its own 'gic_finish_irq' function. Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-09-14MIPS: Add EIC support for GIC.Steven J. Hill2-8/+95
Add support to use an external interrupt controller with the GIC. Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-09-14MIPS: Code clean-ups for the GIC.Steven J. Hill1-24/+16
Fix whitespace, beautify the code and remove debug statements. Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-09-14MIPS: Make GIC code platform independent.Steven J. Hill1-24/+11
The GIC interrupt code is used by multiple platforms and the current code was half Malta dependent code. These changes abstract away the platform specific differences. Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-09-14MIPS: Add support for the 1074K core.Steven J. Hill1-0/+4
Signed-off-by: Steven J. Hill <sjhill@mips.com>
2012-08-27MIPS: CMP/SMTC: Fix tc_id calculationRongQing.Li1-1/+1
Currently the tc_id code is: (read_c0_tcbind() >> TCBIND_CURTC_SHIFT) & TCBIND_CURTC; After processing this becomes: (read_c0_tcbind() >> 21) & ((0xff) << 21) But it should be: (read_c0_tcbind() & ((0xff)<< 21)) >> 21 Signed-off-by: RongQing.Li <roy.qing.li@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4077/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-23MIPS: Fix build error for non-malta VSMP kernelAnoop P A1-0/+2
VSMP kernel build for non-malta platforms fails with following error LD init/built-in.o LD .tmp_vmlinux1 arch/mips/built-in.o: In function `vsmp_init_secondary': smp-mt.c:(.cpuinit.text+0x23cc): undefined reference to `gic_present' smp-mt.c:(.cpuinit.text+0x23d0): undefined reference to `gic_present' make: *** [.tmp_vmlinux1] Error 1 gic_present variable is declared only if IRQ_GIC is selected. Signed-off-by: Anoop P A <anoop.pa@gmail.com> Patchwork: http://patchwork.linux-mips.org/patch/2039/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-23MIPS: introduce CPU_R4K_FPUFlorian Fainelli1-18/+1
R4K-style CPUs have this boolean defined by default. Allows us to remove some lines in arch/mips/kernel/Makefile. Signed-off-by: Florian Fainelli <florian@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/3330/ Signed-off-by: John Crispin <blogic@openwrt.org>
2012-08-17MIPS: Synchronize MIPS count one CPU at a timeJayachandran C2-17/+13
The current implementation of synchronise_count_{master,slave} blocks slave CPUs in early boot until all of them come up. This no longer works because blocking a CPU with interrupts off after notifying the CPU to be online causes problems with the current kernel. Specifically, after the workqueue changes (commit a08489c569dc1 "Pull workqueue changes from Tejun Heo") the CPU_ONLINE notification callback workqueue_cpu_up_callback() will hang on wait_for_completion(&idle_rebind.done), if the slave CPUs are blocked for synchronize_count_slave(). The changes are to update synchronize_count_{master,slave}() to handle one CPU at a time and to call synchronise_count_master() in __cpu_up() so that the CPU_ONLINE notification goes out only after the COP0 COUNT register is synchronized. [ralf@linux-mips.org: This matter only to those few platforms which are using the cp0 counter as their clocksource which are XLP, XLR and MIPS' CMP solution.] Signed-off-by: Jayachandran C <jchandra@broadcom.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4216/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: Module: Deal with malformed HI16/LO16 relocation sequences.Ralf Baechle1-7/+28
In case a series of R_MIPS_HI16 relocations was not followed by an R_MIPS_LO16 relocation we were leaking the hi16 relocation chain. Handle that error and return an error. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-08-17MIPS: Fix race condition in module relocation code.Ralf Baechle1-7/+6
The relocation code was essentially taken from the 2.4 modutils which perform relocation in userspace. In 2.6 relocation of multiple modules may be performed in parallel by the in-kernel loader so the global variable mips_hi16_list won't fly anymore. Fix race by moving it into mod_arch_specific. [ralf@linux-mips.org: folded in Tony's followup fix. Thanks Tony!] Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Tony Wu <tung7970@gmail.com> Cc: linux-mips@linux-mips.org Patchwork: http://patchwork.linux-mips.org/patch/4189/
2012-08-17MIPS: Fix memory leak in error path of HI16/LO16 relocation handling.Ralf Baechle1-2/+7
Commit 6f5d2e970452b5c86906adcb8e7ad246f535ba39 (lmo) / 477c4b07406357ad93d0e32788dbf3ee814eadaa (kernel.org) [[MIPS: VPE: Free relocation chain on error.] fixed the same issue in the vpe loader in 2009 but back then the same bug in module.c went unfixed. Signed-off-by: Ralf Baechle <ralf@linux-mips.org> Reported-by: Akhilesh Kumar <akhilesh.lxr@gmail.com>
2012-08-01MIPS: Loongson 2: Sort out clock managment.Ralf Baechle3-173/+21
For unexplainable reasons the Loongson 2 clock API was implemented in a module so fixing this involved shifting large amounts of code around. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-30Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds6-181/+233
Pull MIPS updates from Ralf Baechle: "More hardware support across the field including a bunch of device drivers. The highlight however really are further steps towards device tree. This has been sitting in -next for ages. All MIPS _defconfigs have been tested to boot or where I don't have hardware available, to at least build fine." * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (77 commits) MIPS: Loongson 1B: Add defconfig MIPS: Loongson 1B: Add board support MIPS: Netlogic: early console fix MIPS: Netlogic: Fix indentation of smpboot.S MIPS: Netlogic: remove cpu_has_dc_aliases define for XLP MIPS: Netlogic: Remove unused pcibios_fixups MIPS: Netlogic: Add XLP SoC devices in FDT MIPS: Netlogic: Add IRQ mappings for more devices MIPS: Netlogic: USB support for XLP MIPS: Netlogic: XLP PCIe controller support. MIPS: Netlogic: Platform changes for XLR/XLS I2C MIPS: Netlogic: Platform NAND/NOR flash support MIPS: Netlogic: Platform changes for XLS USB MIPS: Netlogic: Remove NETLOGIC_ prefix MIPS: Netlogic: SMP wakeup code update MIPS: Netlogic: Update comments in smpboot.S MIPS: BCM63XX: Add 96328avng reference board MIPS: Expose PCIe drivers for MIPS MIPS: BCM63XX: Add PCIe Support for BCM6328 MIPS: BCM63XX: Move the PCI initialization into its own function ...
2012-07-27posix_types.h: Cleanup stale __NFDBITS and related definitionsJosh Boyer1-1/+1
Recently, glibc made a change to suppress sign-conversion warnings in FD_SET (glibc commit ceb9e56b3d1). This uncovered an issue with the kernel's definition of __NFDBITS if applications #include <linux/types.h> after including <sys/select.h>. A build failure would be seen when passing the -Werror=sign-compare and -D_FORTIFY_SOURCE=2 flags to gcc. It was suggested that the kernel should either match the glibc definition of __NFDBITS or remove that entirely. The current in-kernel uses of __NFDBITS can be replaced with BITS_PER_LONG, and there are no uses of the related __FDELT and __FDMASK defines. Given that, we'll continue the cleanup that was started with commit 8b3d1cda4f5f ("posix_types: Remove fd_set macros") and drop the remaining unused macros. Additionally, linux/time.h has similar macros defined that expand to nothing so we'll remove those at the same time. Reported-by: Jeff Law <law@redhat.com> Suggested-by: Linus Torvalds <torvalds@linux-foundation.org> CC: <stable@vger.kernel.org> Signed-off-by: Josh Boyer <jwboyer@redhat.com> [ .. and fix up whitespace as per akpm ] Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
2012-07-25Merge branches 'next/generic', 'next/alchemy', 'next/bcm63xx', ↵Ralf Baechle6-181/+233
'next/cavium', 'next/jz4740', 'next/lantiq', 'next/loongson1b' and 'next/netlogic' into mips-for-linux-next
2012-07-23MIPS: Add CPU support for Loongson1BKelvin Cheung3-143/+162
Loongson 1B is a 32-bit SoC designed by Institute of Computing Technology (ICT) and the Chinese Academy of Sciences (CAS), which implements the MIPS32 release 2 instruction set. [ralf@linux-mips.org: But which is not strictly a MIPS32 compliant device which also is why it identifies itself with the Legacy Vendor ID in the PrID register. When applying the patch I shoveled some code around to keep things in alphabetical order and avoid forward declarations.] Signed-off-by: Kelvin Cheung <keguang.zhang@gmail.com> Cc: To: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: wuzhangjin@gmail.com Cc: zhzhl555@gmail.com Cc: Kelvin Cheung <keguang.zhang@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/3976/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: SMTC: Support for Multi-threaded FPUsSteven J. Hill2-9/+71
Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3603/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Prune some target specific code out of prom.cDavid Daney1-29/+0
This code is not common enough to be in a shared file. It is also not used by any existing boards, so just remove it. [ralf@linux-mips.org: Dropped removal of irq_create_of_mapping which was already removed by abd2363f6a5f1030b935e0bdc15cf917313b3b10 [irq_domain/mips: Allow irq_domain on MIPS]. Moved device_tree_init() and dependencies to its sole user, the XLP code.] Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: devicetree-discuss@lists.ozlabs.org Cc: grant.likely@secretlab.ca Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2946/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: sync-r4k: remove redundant irq operationYong Zhang1-5/+0
Since we have delayed irq enabling to ->smp_finish() Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: smp: Warn on too early irq enableYong Zhang1-0/+5
Just to catch a potential issue. Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3852/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: call set_cpu_online() on cpu being brought up with irq disabledYong Zhang1-2/+2
To prevent a problem as commit 5fbd036b [sched: Cleanup cpu_active madness] and commit 2baab4e9 [sched: Fix select_fallback_rq() vs cpu_active/cpu_online] try to resolve, move set_cpu_online() to the brought up CPU and with irq disabled. Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3851/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: call ->smp_finish() a little lateYong Zhang1-1/+2
We have move irq enable to ->smp_finish. Place ->smp_finish() a little late to prepare for move set_cpu_online() into start_secondary. And it's not necessary to call cpu_set(cpu, cpu_callin_map) and synchronise_count_slave() with irq enabled. Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3850/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: SMTC: delay irq enable to ->smp_finish()Yong Zhang1-1/+2
To prepare for smoothing set_cpu_[active|online]() mess up Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3847/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: BMIPS: delay irq enable to ->smp_finish()Yong Zhang1-7/+7
To prepare for smoothing set_cpu_[active|online]() mess up Signed-off-by: Yong Zhang <yong.zhang0@gmail.com> Cc: Sergei Shtylyov <sshtylyov@mvista.com> Cc: David Daney <david.daney@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/3846/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Oprofile: Fix build as a module.Ralf Baechle1-0/+1
When building oprofile as a module for R10000 or R7000 class processors, E9000 or MIPSxx class cores since 3572a2c37f667ee49333f8863722b8f43eac506b [MIPS: make oprofile use cp0_perfcount_irq if it is set] an ERROR: "cp0_compare_irq" [arch/mips/oprofile/oprofile.ko] undefined! error will happen. Fixed by exporting cp0_compare_irq. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: perf: Fix build error caused by unused counters_per_cpu_to_total()Florian Fainelli1-5/+0
cc1: warnings being treated as errors arch/mips/kernel/perf_event_mipsxx.c:166: error: 'counters_per_cpu_to_total' defined but not used make[2]: *** [arch/mips/kernel/perf_event_mipsxx.o] Error 1 make[2]: *** Waiting for unfinished jobs.... It was first introduced by 82091564cfd7ab8def42777a9c662dbf655c5d25 [MIPS: perf: Add support for 64-bit perf counters.] in 3.2. Signed-off-by: Florian Fainelli <florian@openwrt.org> Cc: linux-mips@linux-mips.org Cc: david.daney@cavium.com Patchwork: https://patchwork.linux-mips.org/patch/3357/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Fix Magic SysRq L kernel crash.Vincent Wen1-0/+3
show_backtrace() was passed a NULL pointer which caused paging request fail. Set to current task as other architectures (ARM, etc) do when passed a NULL task pointer. Signed-off-by: Vincent Wen <vincentwenlinux@gmail.com> Cc: linux-mips@linux-mips.org Cc: cernekee@gmail.com Patchwork: https://patchwork.linux-mips.org/patch/3524/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: BMIPS: Fix duplicate header inclusion.Danny Kukawka1-1/+0
Signed-off-by: Danny Kukawka <danny.kukawka@bisect.de> Cc: Danny Kukawka <dkukawka@suse.de> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/3369/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: SMTC: Spelling and grammar corrections.Ralf Baechle1-5/+5
Extractd from Steven J. Hill's https://patchwork.linux-mips.org/patch/3603/. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Properly align the .data..init_task section.David Daney1-1/+2
Improper alignment can lead to unbootable systems and/or random crashes. [ralf@linux-mips.org: This is a lond standing bug since 6eb10bc9e2deab06630261cd05c4cb1e9a60e980 (kernel.org) rsp. c422a10917f75fd19fa7fe070aaaa23e384dae6f (lmo) [MIPS: Clean up linker script using new linker script macros.] so dates back to 2.6.32.] Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: <stable@vger.kernel.org> Patchwork: https://patchwork.linux-mips.org/patch/3881/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Fix race condition with FPU thread task flag during context switch.Leonid Yegoshin3-22/+7
[ralf@linux-mips.org: Cosmetic changes; also fixed up r2300_switch.S and octeon_switch.S which needed similar modifications.] Signed-off-by: Leonid Yegoshin <yegoshin@mips.com> Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3784/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Refactor 'clear_page' and 'copy_page' functions.Steven J. Hill1-1/+7
Remove usage of the '__attribute__((alias("...")))' hack that aliased to integer arrays containing micro-assembled instructions. This hack breaks when building a microMIPS kernel. It also makes the code much easier to understand. [ralf@linux-mips.org: Added back export of the clear_page and copy_page symbols so certain modules will work again. Also fixed build with CONFIG_SIBYTE_DMA_PAGEOPS enabled.] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3866/ Acked-by: David Daney <david.daney@cavium.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-19MIPS: Don't panic on 5KEc.Leonid Yegoshin2-0/+5
It's a bloody bog standard MIPS64R2 core with just a new PrId ID. Iow that essentially means Linux just panics because it doesn't know how to name the core. [ralf@linux-mips.org: Split original patch into several smaller patches.] Signed-off-by: Leonid Yegoshin <yegoshin@mips.com> Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3792/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-07MIPS: Add support for the M14Kc core.Steven J. Hill1-1/+6
[ralf@linux-mips.org: Fixed whitespace damage.] Signed-off-by: Steven J. Hill <sjhill@mips.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3773/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-07MIPS: Provide a symbol for the legacy performance counter interrupt.Ralf Baechle1-1/+1
Based on https://patchwork.linux-mips.org/patch/3576 - but this really deserves its own patchset and the symbol should also be used :) Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-06-01new helper: signal_delivered()Al Viro1-1/+1
Does block_sigmask() + tracehook_signal_handler(); called when sigframe has been successfully built. All architectures converted to it; block_sigmask() itself is gone now (merged into this one). I'm still not too happy with the signature, but that's a separate story (IMO we need a structure that would contain signal number + siginfo + k_sigaction, so that get_signal_to_deliver() would fill one, signal_delivered(), handle_signal() and probably setup...frame() - take one). Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-06-01most of set_current_blocked() callers want SIGKILL/SIGSTOP removed from setAl Viro4-7/+0
Only 3 out of 63 do not. Renamed the current variant to __set_current_blocked(), added set_current_blocked() that will exclude unblockable signals, switched open-coded instances to it. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-06-01TIF_RESTORE_SIGMASK can be set only when TIF_SIGPENDING is setAl Viro1-1/+1
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-06-01pull clearing RESTORE_SIGMASK into block_sigmask()Al Viro1-15/+3
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-06-01new helper: sigmask_to_save()Al Viro1-8/+3
replace boilerplate "should we use ->saved_sigmask or ->blocked?" with calls of obvious inlined helper... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2012-06-01new helper: restore_saved_sigmask()Al Viro1-4/+1
first fruits of ..._restore_sigmask() helpers: now we can take boilerplate "signal didn't have a handler, clear RESTORE_SIGMASK and restore the blocked mask from ->saved_mask" into a common helper. Open-coded instances switched... Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
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