starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2017-11-03	Update MIPS email addresses	Paul Burton	1	-1/+1
2017-08-30	MIPS: CPS: Have asm/mips-cps.h include CM & CPC headers	Paul Burton	1	-2/+1
2017-08-30	MIPS: Abstract CPU core & VP(E) ID access through accessor functions	Paul Burton	1	-2/+2
2017-08-30	MIPS: CPC: Use BIT/GENMASK for register fields, order & drop shifts	Paul Burton	1	-1/+1
2017-08-29	MIPS: CM: Use BIT/GENMASK for register fields, order & drop shifts	Paul Burton	1	-4/+4
2016-11-04	MIPS: CPC: Provide default mips_cpc_default_phys_base to ignore CPC	Paul Burton	1	-1/+10
2016-10-04	MIPS: CPC: Avoid lock when MIPS CM >= 3 is present	Matt Redfearn	1	-1/+12
2016-10-04	MIPS: CPC: Convert bare 'unsigned' to 'unsigned int'	Matt Redfearn	1	-3/+3
2015-11-11	MIPS: CM, CPC: Ensure core-other GCRs reflect the correct core	Paul Burton	1	-0/+6
2015-08-26	MIPS: CPC: Remove "weak" from mips_cpc_phys_base() and make it static	Bjorn Helgaas	1	-1/+8
2015-08-26	MIPS: CPC: Fix type for GCR CPC base reg for 64-bit	Markos Chandras	1	-1/+1
2014-11-25	MIPS: Replace use of phys_t with phys_addr_t.	Ralf Baechle	1	-2/+2
2014-05-28	MIPS: smp-cps: rework core/VPE initialisation	Paul Burton	1	-0/+2
2014-05-02	MIPS: CPC: provide locking functions	Paul Burton	1	-0/+26
2014-03-07	MIPS: Add CPC probe, access functions	Paul Burton	1	-0/+52