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2019-07-30MIPS: qi_lb60: Migrate to devicetreePaul Cercueil1-491/+0
Move all the platform data to devicetree. The only bit dropped is the PWM beeper, which requires the PWM driver to be updated. I figured it's okay to remove it here since it's really a non-critical device, and it'll be re-introduced soon enough. The other change is the CS line of the SPI is now set as active low. The SPI core would have forced "active low" anyway, unless the 'spi-cs-high' property is set. In the process of moving to devicetree, we also switched to new drivers: - We use the simple-audio-card and simple-amplifier drivers instead of the custom ASoC code; - We use the new Ingenic DRM driver coupled with the GiantPlus GPM940B0 DRM panel driver instead of the old framebuffer driver; - We use the new jz4780-dma driver instead of the old jz4740-dma one; - We use the ingenic-nand and jz4740-ecc drivers instead of the old jz4740-nand driver; - We use ingenic-battery instead of jz4740-battery; - We use iio-hwmon instead of jz4740-hwmon; - We use ingenic-iio instead of the old jz4740-adc MFD driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Artur Rojek <contact@artur-rojek.eu> [paul.burton@mips.com: Drop the unused & undocumented ili8960 spi@0 node.] Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-23MIPS: qi_lb60: Move MMC configuration to devicetreePaul Cercueil1-32/+0
Move the MMC configuration from the board C file to devicetree. The 'power' GPIO was removed and instead the vmmc regulator is used, to follow the changes introduced in the jz4740-mmc driver. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-17Merge tag 'clk-for-linus' of ↵Linus Torvalds1-2/+0
git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "This round of clk driver and framework updates is heavy on the driver update side. The two main highlights in the core framework are the addition of an bulk clk_get API that handles optional clks and an extra debugfs file that tells the developer about the current parent of a clk. The driver updates are dominated by i.MX in the diffstat, but that is mostly because that SoC has started converting to the clk_hw style of clk registration. The next big update is in the Amlogic meson clk driver that gained some support for audio, cpu, and temperature clks while fixing some PLL issues. Finally, the biggest thing that stands out is the conversion of a large part of the Allwinner sunxi-ng driver to the new clk parent scheme that uses less strings and more pointer comparisons to match clk parents and children up. In general, it looks like we have a lot of little fixes and tweaks here and there to clk data along with the normal addition of a handful of new drivers and a couple new core framework features. Core: - Add a 'clk_parent' file in clk debugfs - Add a clk_bulk_get_optional() API (with devm too) New Drivers: - Support gated clk controller on MIPS based BCM63XX SoCs - Support SiLabs Si5341 and Si5340 chips - Support for CPU clks on Raspberry Pi devices - Audsys clock driver for MediaTek MT8516 SoCs Updates: - Convert a large portion of the Allwinner sunxi-ng driver to new clk parent scheme - Small frequency support for SiLabs Si544 chips - Slow clk support for AT91 SAM9X60 SoCs - Remove dead code in various clk drivers (-Wunused) - Support for Marvell 98DX1135 SoCs - Get duty cycle of generic pwm clks - Improvement in mmc phase calculation and cleanup of some rate defintions - Switch i.MX6 and i.MX7 clock drivers to clk_hw based APIs - Add GPIO, SNVS and GIC clocks for i.MX8 drivers - Mark imx6sx/ul/ull/sll MMDC_P1_IPG and imx8mm DRAM_APB as critical clock - Correct imx7ulp nic1_bus_clk and imx8mm audio_pll2_clk clock setting - Add clks for new Exynos5422 Dynamic Memory Controller driver - Clock definition for Exynos4412 Mali - Add CMM (Color Management Module) clocks on Renesas R-Car H3, M3-N, E3, and D3 - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas RZ/G2M - Support for 32 bit clock IDs in TI's sci-clks for J721e SoCs - TI clock probing done from DT by default instead of firmware - Fix Amlogic Meson mpll fractional part and spread sprectrum issues - Add Amlogic meson8 audio clocks - Add Amlogic g12a temperature sensors clocks - Add Amlogic g12a and g12b cpu clocks - Add TPU (Timer Pulse Unit / PWM) clocks on Renesas R-Car H3, M3-W, and M3-N - Add CMM (Color Management Module) clocks on Renesas R-Car M3-W - Add Clock Domain support on Renesas RZ/N1" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (190 commits) clk: consoldiate the __clk_get_hw() declarations clk: sprd: Add check for return value of sprd_clk_regmap_init() clk: lochnagar: Update DT binding doc to include the primary SPDIF MCLK clk: Add Si5341/Si5340 driver dt-bindings: clock: Add silabs,si5341 clk: clk-si544: Implement small frequency change support clk: add BCM63XX gated clock controller driver devicetree: document the BCM63XX gated clock bindings clk: at91: sckc: use dedicated functions to unregister clock clk: at91: sckc: improve error path for sama5d4 sck registration clk: at91: sckc: remove unnecessary line clk: at91: sckc: improve error path for sam9x5 sck register clk: at91: sckc: add support to free slow clock osclillator clk: at91: sckc: add support to free slow rc oscillator clk: at91: sckc: add support to free slow oscillator clk: rockchip: export HDMIPHY clock on rk3228 clk: rockchip: add watchdog pclk on rk3328 clk: rockchip: add clock id for hdmi_phy special clock on rk3228 clk: rockchip: add clock id for watchdog pclk on rk3328 clk: at91: sckc: add support for SAM9X60 ...
2019-06-26MIPS: Remove dead codePaul Cercueil1-2/+0
Remove the unused <asm/mach-jz4740/clock.h> include. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2019-06-12MIPS: lb60: Fix pin mappingsPaul Cercueil1-8/+8
The pin mappings introduced in commit 636f8ba67fb6 ("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers") are completely wrong. The pinctrl driver name is incorrect, and the function and group fields are swapped. Fixes: 636f8ba67fb6 ("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers") Cc: <stable@vger.kernel.org> Signed-off-by: Paul Cercueil <paul@crapouillou.net> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: James Hogan <jhogan@kernel.org> Cc: od@zcrc.me Cc: linux-mips@vger.kernel.org Cc: linux-kernel@vger.kernel.org
2019-05-21treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 3Thomas Gleixner1-4/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gnu general public license version 2 or later as published by the free software foundation extracted by the scancode license scanner the SPDX license identifier GPL-2.0-or-later has been chosen to replace the boilerplate/reference in 9 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Steve Winslow <swinslow@gmail.com> Reviewed-by: Jilayne Lovejoy <opensource@jilayne.com> Reviewed-by: Allison Randal <allison@lohutok.net> Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190519154040.848507137@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2018-12-17mmc: jz4740: Use GPIO descriptor for powerLinus Walleij1-4/+2
The power GPIO line is passed with inversion flags and all from the platform data. Switch to using an optional GPIO descriptor and use this to switch the power. Augment the only boardfile to pass in the proper "power" descriptor in the GPIO descriptor machine table instead. As the GPIO handling is now much simpler, we can cut down on some overhead code. Cc: Paul Cercueil <paul@crapouillou.net> Cc: linux-mips@linux-mips.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-12-17mmc: jz4740: Get CD/WP GPIOs from descriptorsLinus Walleij1-3/+9
Modifty the JZ4740 driver to retrieve card detect and write protect GPIO pins from GPIO descriptors instead of hard-coded global numbers. Augment the only board file using this in the process and cut down on passed in platform data. Preserve the code setting the caps2 flags for CD and WP as active low or high since the slot GPIO code currently ignores the gpiolib polarity inversion semantice and uses the raw accessors to read the GPIO lines, but set the right polarity flags in the descriptor table for jz4740. Cc: Paul Cercueil <paul@crapouillou.net> Cc: linux-mips@linux-mips.org Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2018-07-18MIPS: jz4740: Move jz4740_nand.h header to include/linux/platform_data/jz4740Boris Brezillon1-1/+2
This way we will be able to compile the jz4740_nand driver when COMPILE_TEST=y. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Acked-by: Paul Burton <paul.burton@mips.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2018-02-14spi: spi-gpio: Rewrite to use GPIO descriptorsLinus Walleij1-8/+18
This converts the bit-banged GPIO SPI driver to looking up and using GPIO descriptors to get a handle on GPIO lines for SCK, MOSI, MISO and all CS lines. All existing board files are converted in one go to keep it all consistent. With these conversions I rarely find any interrim steps that makes any sense. Device tree probing and GPIO handling should work like before also after this patch. For board files, we stop using controller data to pass the GPIO line for chip select, instead we pass this as a GPIO descriptor lookup like everything else. In some s3c24xx machines the names of the SPI devices were set to "spi-gpio" rather than "spi_gpio" which can never have worked, I fixed it working (I guess) as part of this patch set. Sometimes I wonder how this code got upstream in the first place, it obviously is not tested. mach-s3c64xx/mach-smartq.c has the same problem and additionally defines the *same* GPIO line for MOSI and MISO which is not going to be accepted by gpiolib. As the lines were number 1,2,2 I assumed it was a typo and use lines 1,2,3. A comment gives awat that line 0 is chip select though no actual SPI device is provided for the LCD supposed to be on this bit-banged SPI bus. I left it intact instead of just deleting the bus though. Kill off board file code that try to initialize the SPI lines to the same values that they will later be set by the spi_gpio driver anyways. Given the huge number of weird things in these board files I do not think this code is very tested or put in with much afterthought anyways. In order to assert that we do not get performance regressions on this crucial bing-banged driver, a ran a script like this dumping the Ilitek ILI9322 regmap 10000 times (it has no caching obviously) on an otherwise idle system in two iterations before and after the patches: #!/bin/sh for run in `seq 10000` do cat /debug/regmap/spi0.0/registers > /dev/null done Before the patch: time test.sh real 3m 41.03s user 0m 29.41s sys 3m 7.22s time test.sh real 3m 44.24s user 0m 32.31s sys 3m 7.60s After the patch: time test.sh real 3m 41.32s user 0m 28.92s sys 3m 8.08s time test.sh real 3m 39.92s user 0m 30.20s sys 3m 5.56s So any performance differences seems to be in the error margin. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Olof Johansson <olof@lixom.net> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-05-22MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several driversPaul Cercueil1-12/+36
We set the pin configuration for the jz4740-nand, jz4740-mmc, jz4740-fb, jz4740-pwm and jz4740-uart drivers. This will permit those drivers to be cleaned out of the custom GPIO code that they currently use. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2016-11-05MIPS: qi_lb60: Probe RTC driver from DT and use it as power controllerPaul Cercueil1-1/+0
Since we already have a devicetree node for the jz4740-rtc driver, we don't have to probe it from platform code. Besides, using the jz4740-rtc driver as the power controller for the qi_lb60 platform allows us to remove the jz4740 platform power-off code, since this is the only jz4740-based board upstream. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Acked-by: Maarten ter Huurne <maarten@treewalker.org> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
2016-05-24Merge tag 'for-linus-20160523' of git://git.infradead.org/linux-mtdLinus Torvalds1-36/+51
Pull MTD updates from Brian Norris: "First cycle with Boris as NAND maintainer! Many (most) bullets stolen from him. Generic: - Migrated NAND LED trigger to be a generic MTD trigger NAND: - Introduction of the "ECC algorithm" concept, to avoid overloading the ECC mode field too much more - Replaced the nand_ecclayout infrastructure with something a little more flexible (finally!) and future proof - Rework of the OMAP GPMC and NAND drivers; the TI folks pulled some of this into their own tree as well - Prepare the sunxi NAND driver to receive DMA support - Handle bitflips in erased pages on GPMI revisions that do not support this in hardware. SPI NOR: - Start using the spi_flash_read() API for SPI drivers that support it (i.e., SPI drivers with special memory-mapped flash modes) And other small scattered improvments" * tag 'for-linus-20160523' of git://git.infradead.org/linux-mtd: (155 commits) mtd: spi-nor: support GigaDevice gd25lq64c mtd: nand_bch: fix spelling of "probably" mtd: brcmnand: respect ECC algorithm set by NAND subsystem gpmi-nand: Handle ECC Errors in erased pages Documentation: devicetree: deprecate "soft_bch" nand-ecc-mode value mtd: nand: add support for "nand-ecc-algo" DT property mtd: mtd: drop NAND_ECC_SOFT_BCH enum value mtd: drop support for NAND_ECC_SOFT_BCH as "soft_bch" mapping mtd: nand: read ECC algorithm from the new field mtd: nand: fsmc: validate ECC setup by checking algorithm directly mtd: nand: set ECC algorithm to Hamming on fallback staging: mt29f_spinand: set ECC algorithm explicitly CRIS v32: nand: set ECC algorithm explicitly mtd: nand: atmel: set ECC algorithm explicitly mtd: nand: davinci: set ECC algorithm explicitly mtd: nand: bf5xx: set ECC algorithm explicitly mtd: nand: omap2: Fix high memory dma prefetch transfer mtd: nand: omap2: Start dma request before enabling prefetch mtd: nandsim: add __init attribute mtd: nand: move of_get_nand_xxx() helpers into nand_base.c ...
2016-05-13MIPS: JZ4740: Qi LB60: Remove support for AVT2 variantMaarten ter Huurne1-50/+2
AVT2 was a prototype board of which about 5 were made, none of which are in use anymore. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Cc: Paul Cercueil <paul@crapouillou.net> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/13103/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-05-06mtd: nand: jz4740: switch to mtd_ooblayout_opsBoris Brezillon1-36/+51
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de>
2015-10-26MIPS: JZ4740: Remove unused linux/leds_pwm.h includeThierry Reding1-2/+0
The board code never sets up a leds-pwm device, so including the header is not necessary. Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11262/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-10-26MIPS: JZ4740: Use PWM lookup tableThierry Reding1-3/+8
Associate the PWM with the pwm-beeper device using a PWM lookup table. This will eventually allow the legacy function calls to pwm_request() to be removed from all consumer drivers. Signed-off-by: Thierry Reding <thierry.reding@gmail.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11261/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-10-01MIPS: Fix the build on jz4740 after removing the custom gpio.hAlban Bedel1-0/+1
Somehow the wrong version of the patch to remove the use of custom gpio.h on mips has been merged. This patch add the missing fixes for a build error on jz4740 because linux/gpio.h doesn't provide any machine specfics definitions anymore. Signed-off-by: Alban Bedel <albeu@free.fr> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Brian Norris <computersforpeace@gmail.com> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/11089/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-21MIPS: JZ4740: use Ingenic SoC UART driverPaul Burton1-2/+0
Remove the serial support from arch/mips/jz4740 & make use of the new Ingenic SoC UART driver. This is done for both regular & early console output. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: devicetree@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Cc: Apelete Seketeli <apelete@seketeli.net> Cc: Alexandre Courbot <gnurou@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10160/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-06-21MIPS,clk: migrate JZ4740 to common clock frameworkPaul Burton1-5/+0
Migrate the JZ4740 & the qi_lb60 board to use common clock framework via the new Ingenic SoC CGU driver. Note that the JZ4740-specific debugfs code is removed since common clock framework provides its own debug capabilities. Signed-off-by: Paul Burton <paul.burton@imgtec.com> Co-authored-by: Paul Cercueil <paul@crapouillou.net> Cc: Ian Campbell <ijc+devicetree@hellion.org.uk> Cc: Kumar Gala <galak@codeaurora.org> Cc: Lars-Peter Clausen <lars@metafoo.de> Cc: Mark Rutland <mark.rutland@arm.com> Cc: Mike Turquette <mturquette@linaro.org> Cc: Pawel Moll <pawel.moll@arm.com> Cc: Rob Herring <robh+dt@kernel.org> Cc: Stephen Boyd <sboyd@codeaurora.org> Cc: devicetree@vger.kernel.org Cc: linux-clk@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: Fabian Frederick <fabf@skynet.be> Cc: Deng-Cheng Zhu <dengcheng.zhu@imgtec.com> Cc: Linus Walleij <linus.walleij@linaro.org> Cc: Stephen Warren <swarren@wwwdotorg.org> Cc: linux-kernel@vger.kernel.org Cc: Brian Norris <computersforpeace@gmail.com> Patchwork: https://patchwork.linux-mips.org/patch/10151/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-02mtd: nand: jz4740: Convert to GPIO descriptor APILars-Peter Clausen1-1/+10
Use the GPIO descriptor API instead of the deprecated legacy GPIO API to manage the busy GPIO. The patch updates both the jz4740 nand driver and the only user of the driver the qi-lb60 board driver. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-28gpio: split gpiod board registration into machine headerLinus Walleij1-0/+1
As per example from the regulator subsystem: put all defines and functions related to registering board info for GPIO descriptors into a separate <linux/gpio/machine.h> header. Cc: Andrew Victor <linux@maxim.org.za> Cc: Nicolas Ferre <nicolas.ferre@atmel.com> Cc: Jean-Christophe Plagniol-Villard <plagnioj@jcrosoft.com> Cc: Ralf Baechle <ralf@linux-mips.org> Cc: Thierry Reding <thierry.reding@gmail.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Reviewed-by: Alexandre Courbot <gnurou@gmail.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2014-04-23ASoC: qi_lb60: Use GPIO descriptor APILars-Peter Clausen1-0/+11
The new GPIO descriptor API is now the preferred way for handling GPIOs. It also allows us to separate the platform depended code from the platform independent code (Which will make it possible to increase build test coverage of the platform independent code). Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-25MIPS: jz4740: update platform data for JZ4740 usb device controllerApelete Seketeli1-0/+1
The platform data already available in tree for JZ4740 USB Device Controller was previously used by an out-of-tree USB gadget driver which was not relying on the musb driver and was written by Ingenic and the Qi-Hardware community. Update platform data for JZ4740 USB device controller to be used with musb driver. Signed-off-by: Apelete Seketeli <apelete@seketeli.net> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: John Crispin <blogic@openwrt.org> Patchwork: http://patchwork.linux-mips.org/patch/6265/
2013-07-05MIPS: jz4740: Register jz4740 DMA deviceLars-Peter Clausen1-0/+1
Register a device for the newly added jz4740 dmaengine driver. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Ralf Baechle <ralf@linux-mips.org> [manually edited to align struct assignment] Signed-off-by: Vinod Koul <vinod.koul@intel.com>
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle1-4/+4
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-10-05pwm: Add Ingenic JZ4740 supportThierry Reding1-0/+1
This commit moves the driver to drivers/pwm and converts it to the new PWM framework. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Tested-by: Lars-Peter Clausen <lars@metafoo.de> Acked-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: JZ4740: qi_lb60: Look for NAND chip in bank 1.Maarten ter Huurne1-0/+1
All NanoNotes have their NAND in bank 1. Specifying the bank is required since multi-bank support was introduced. Signed-off-by: Maarten ter Huurne <maarten@treewalker.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3561/ Acked-By: David Woodhouse <David.Woodhouse@intel.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-01-20ASoC: jz4740: Convert qi_lb60 to use snd_soc_register_card()Axel Lin1-0/+6
Use snd_soc_register_card() instead of creating a "soc-audio" platform device. Signed-off-by: Axel Lin <axel.lin@gmail.com> Acked-by: Lars-Peter Clausen <lars@metafoo.de> Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
2011-12-08MIPS: Fix up inconsistency in panic() string argument.Ralf Baechle1-1/+1
Panic() invokes printk() to add a \n internally, so panic arguments should not themselves end in \n. Panic invocations in arch/mips and elsewhere are inconsistently sometimes terminating in \n, sometimes not. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-31Fix common misspellingsLucas De Marchi1-2/+2
Fixes generated by 'codespell' and manually reviewed. Signed-off-by: Lucas De Marchi <lucas.demarchi@profusion.mobi>
2011-03-25MIPS: JZ4740: Set nand ecc offsets for the qi_lb60 boardLars-Peter Clausen1-4/+4
The jz4740 nand driver now requires that the ecc offsets are set. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2058/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-03-25MIPS: JZ4740: qi_lb60: Add gpio-charger deviceLars-Peter Clausen1-0/+24
Register the gpio-charger device which reports whether device is currently charging or not. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/2059/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-12-22Merge branch 'master' into for-nextJiri Kosina1-2/+2
Conflicts: MAINTAINERS arch/arm/mach-omap2/pm24xx.c drivers/scsi/bfa/bfa_fcpim.c Needed to update to apply fixes for which the old branch was too outdated.
2010-12-16MIPS: jz4740: qi_lb60: Fix gpio for the 6th row of the keyboard matrixLars-Peter Clausen1-2/+2
This patch fixes the gpio number for the 6th row of the keyboard matrix. (And fixes a typo in my name...) Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: stable@kernel.org Signed-off-by: https://patchwork.linux-mips.org/patch/1754/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2010-11-01tree-wide: fix comment/printk typosUwe Kleine-König1-2/+2
"gadget", "through", "command", "maintain", "maintain", "controller", "address", "between", "initiali[zs]e", "instead", "function", "select", "already", "equal", "access", "management", "hierarchy", "registration", "interest", "relative", "memory", "offset", "already", Signed-off-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Signed-off-by: Jiri Kosina <jkosina@suse.cz>
2010-08-05MIPS: JZ4740: Add qi_lb60 board supportLars-Peter Clausen1-0/+471
Add support for the qi_lb60 (a.k.a QI Ben NanoNote) clamshell device. Signed-off-by: Lars-Peter Clausen <lars@metafoo.de> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/1472/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>