starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2010-03-13	pci-dma: add linux/pci-dma.h to linux/pci.h	FUJITA Tomonori	1	-2/+0
2010-03-13	pci-dma: mips: use include/linux/pci-dma.h	FUJITA Tomonori	1	-21/+1
2010-03-13	Add generic sys_olduname()	Christoph Hellwig	1	-0/+1
2010-03-13	improve sys_newuname() for compat architectures	Christoph Hellwig	1	-1/+2
2010-03-13	Add generic sys_ipc wrapper	Christoph Hellwig	1	-0/+1
2010-03-03	Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tj/...	Linus Torvalds	1	-25/+0
2010-03-01	Merge branch 'for-linus' of master.kernel.org:/home/rmk/linux-2.6-arm	Linus Torvalds	1	-1/+2
2010-02-27	MIPS: ARC: Cleanup unused definitions from sgialib.h	Yoichi Yuasa	1	-45/+0
2010-02-27	MIPS: Alchemy: use 36bit addresses for PCMCIA resources.	Manuel Lauss	2	-15/+1
2010-02-27	MIPS: Optimize spinlocks.	David Daney	3	-81/+67
2010-02-27	MIPS: i8259: Convert IRQ controller lock to raw spinlock.	Ralf Baechle	1	-3/+3
2010-02-27	MIPS: Make various locks static.	Ralf Baechle	1	-1/+0
2010-02-27	MIPS: Use generic ucontext.h	Yoichi Yuasa	1	-21/+1
2010-02-27	MIPS: Use generic serial.h	Yoichi Yuasa	1	-22/+1
2010-02-27	MIPS: Use generic parport.h	Yoichi Yuasa	1	-15/+1
2010-02-27	MIPS: Use generic current.h	Yoichi Yuasa	1	-23/+1
2010-02-27	MIPS: Enable Read Inhibit/eXecute Inhibit for Octeon+ CPUs	David Daney	1	-0/+3
2010-02-27	MIPS: Give Octeon+ CPUs their own cputype.	David Daney	1	-1/+1
2010-02-27	MIPS: Implement Read Inhibit/eXecute Inhibit	David Daney	5	-29/+128
2010-02-27	MIPS: Add TLBR and ROTR to uasm.	David Daney	1	-0/+4
2010-02-27	MIPS: Add accessor functions and bit definitions for c0_PageGrain	David Daney	1	-0/+11
2010-02-27	MIPS: TXx9: Remove forced serial console setting	Yoichi Yuasa	1	-1/+0
2010-02-27	MIPS: Alchemy: Remove prom_getcmdline()	Yoichi Yuasa	1	-1/+0
2010-02-27	MIPS: Allow the auxv's elf_platform entry to be set.	David Daney	1	-7/+7
2010-02-27	MMC: AU1xMMC: Allow platforms to disable host capabilities	Manuel Lauss	1	-0/+1
2010-02-27	MIPS: Move arch/mips/mm/uasm.h to arch/mips/include/asm/uasm.h	Florian Fainelli	1	-0/+191
2010-02-27	MIPS: Support 36-bit iomem on 32-bit Au1x00	pascal@pabr.org	1	-2/+2
2010-02-27	MIPS: AR7: Implement clock API	Florian Fainelli	1	-20/+3
2010-02-27	MIPS: AR7: Implement gpiolib	Florian Fainelli	1	-78/+8
2010-02-27	MIPS: msp71xx: remove unused prom_getcmdline()	Yoichi Yuasa	1	-1/+0
2010-02-27	MIPS: Nuke trailing blank lines	Ralf Baechle	11	-11/+0
2010-02-27	MIPS: Cleanup switches with cases that can be merged	Roel Kluin	1	-6/+2
2010-02-27	MIPS: Decode c0_config4 for large TLBs.	David Daney	1	-0/+4
2010-02-27	MIPS: add readl/write_be accessors	Florian Fainelli	1	-0/+18
2010-02-27	MIPS: Loongson: Change the Email address of Wu Zhangjin	Wu Zhangjin	7	-20/+8
2010-02-27	MIPS: Loongson: Cleanup of the environment variables	Wu Zhangjin	1	-1/+1
2010-02-27	MIPS: Octeon: Use optimized memory barrier primitives.	David Daney	1	-12/+31
2010-02-27	MIPS: New macro smp_mb__before_llsc.	David Daney	6	-25/+32
2010-02-27	MIPS: Remove unused macros from barrier.h	David Daney	1	-2/+0
2010-02-27	MIPS: Octeon: Add I2C platform device.	David Daney	1	-0/+5
2010-02-27	MIPS: Simplify param.h by using <asm-generic/param.h>	Robert P. J. Day	1	-16/+1
2010-02-27	MIPS: Two-level pagetables for 64-bit kernels with 64KB pages.	David Daney	4	-17/+37
2010-02-27	MIPS: Alchemy: Only build AU1000 INTC code for compatible cpus	Manuel Lauss	1	-1/+1
2010-02-27	MIPS: Alchemy: use runtime cpu detection in GPIO code.	Manuel Lauss	1	-42/+48
2010-02-27	MIPS: Alchemy: Add au1000-eth platform device	Florian Fainelli	1	-0/+17
2010-02-27	MIPS: Alchemy: Extended DB1200 board support.	Manuel Lauss	1	-28/+5
2010-02-27	MIPS: Alchemy: remove unused SYS area structure	Manuel Lauss	1	-49/+0
2010-02-27	MIPS: Alchemy: get rid of superfluous UART definitions	Manuel Lauss	1	-92/+0
2010-02-27	MIPS: Alchemy: prom_putchar is board dependent	Manuel Lauss	1	-0/+19
2010-02-27	MIPS: Alchemy: change dbdma to accept physical memory addresses	Manuel Lauss	1	-2/+2