summaryrefslogtreecommitdiff
path: root/arch/mips/include/asm/stackframe.h
AgeCommit message (Expand)AuthorFilesLines
2017-11-01MIPS: Fix exception entry when CONFIG_EVA enabledMatt Redfearn1-4/+4
2017-09-06MIPS: Add DWARF unwinding to assemblyCorey Minyard1-99/+132
2017-09-06MIPS: Make SAVE_SOME more standardCorey Minyard1-14/+37
2017-01-03MIPS: Remove RESTORE_ALL_AND_RETPaul Burton1-8/+0
2017-01-03MIPS: Remove r2_emul_return from struct thread_infoPaul Burton1-0/+4
2017-01-03MIPS: Only change $28 to thread_info if coming from user modeMatt Redfearn1-0/+7
2016-02-02MIPS: Fix FPU disable with preemptionJames Hogan1-2/+2
2015-08-03MIPS: Flush RPS on kernel entry with EVAJames Hogan1-0/+25
2015-02-17MIPS: asm: stackframe: Do not preserve the HI/LO registers on MIPS R6Leonid Yegoshin1-4/+4
2014-05-24MIPS: MT: Remove SMTC supportRalf Baechle1-195/+1
2014-03-31MIPS: Fix gigaton of warning building with microMIPS.Ralf Baechle1-1/+1
2013-10-30MIPS: Move definition of SMP processor id register to header fileJayachandran C1-18/+6
2013-07-01MIPS: Don't save/restore OCTEON wide multiplier state on syscalls.David Daney1-15/+14
2013-05-09MIPS: microMIPS: Add support for exception handling.Steven J. Hill1-6/+6
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle1-7/+7
2011-09-21MIPS: Don't clobber CP0_STATUS value for CONFIG_MIPS_MT_SMTCDavid Daney1-2/+2
2011-03-31Fix common misspellingsLucas De Marchi1-1/+1
2010-04-30MIPS: Loongson-2F: Use CONFIG_CPU_JUMP_WORKAROUNDS to control workarounds.Wu Zhangjin1-1/+1
2010-04-12MIPS: Loongson-2F: Flush the branch target history in BTB and RASWu Zhangjin1-0/+19
2009-12-17MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.David Daney1-10/+10
2009-12-17MIPS: Reorder operations in stackframe.h for better schedulingDavid Daney1-8/+12
2009-01-11MIPS: Cavium OCTEON multiplier state preservation.David Daney1-0/+17
2008-10-11MIPS: Move headfiles to new location below arch/mips/includeRalf Baechle1-0/+574