starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2015-04-10	MIPS: r4kcache: Use correct base register for MIPS R6 cache flushes	Markos Chandras	1	-44/+45
2015-02-17	MIPS: asm: r4kcache: Add MIPS R6 cache unroll functions	Markos Chandras	1	-2/+148
2014-12-12	Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus	Linus Torvalds	1	-59/+0
2014-11-24	MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration	Ralf Baechle	1	-59/+0
2014-11-24	MIPS: r4kcache: Add EVA case for protected_writeback_dcache_line	Markos Chandras	1	-0/+4
2014-06-30	MIPS: KVM: Reformat code and comments	Deng-Cheng Zhu	1	-0/+3
2014-05-30	MIPS: Add minimal support for OCTEON3 to c-r4k.c	David Daney	1	-0/+2
2014-05-24	MIPS: MT: Remove SMTC support	Ralf Baechle	1	-3/+2
2014-03-31	MIPS: Fix gigaton of warning building with microMIPS.	Ralf Baechle	1	-2/+2
2014-03-27	MIPS: asm: r4kcache: Add EVA cache flushing functions	Leonid Yegoshin	1	-1/+151
2014-03-27	MIPS: asm: r4kcache: Add protected cache operation for EVA	Leonid Yegoshin	1	-0/+18
2014-03-27	MIPS: asm: r4kcache: Build flushing code for instruction cache	Leonid Yegoshin	1	-0/+1
2014-01-15	MIPS: fix blast_icache32 on loongson2	Aaro Koskinen	1	-21/+22
2014-01-15	MIPS: fix case mismatch in local_r4k_flush_icache_range()	Huacai Chen	1	-4/+4
2013-10-30	MIPS: Loongson: Get rid of Loongson 2 #ifdefery all over arch/mips.	Ralf Baechle	1	-11/+30
2013-02-01	MIPS: Whitespace cleanup.	Ralf Baechle	1	-6/+6
2011-04-06	update David Miller's old email address	Justin P. Mattock	1	-1/+1
2009-06-17	MIPS: Support 64-byte D-cache line size	Kevin Cernekee	1	-0/+1
2008-10-11	MIPS: Move headfiles to new location below arch/mips/include	Ralf Baechle	1	-0/+443