starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2011-10-25	MIPS: Add accessor macros for 64-bit performance counter registers.	David Daney	1	-0/+8
2011-03-31	Fix common misspellings	Lucas De Marchi	1	-2/+2
2010-10-29	MIPS: Add BMIPS CP0 register definitions	Kevin Cernekee	1	-0/+51
2010-08-05	MIPS: Define ST0_NMI in asm/mipsregs.h	David Daney	1	-0/+1
2010-05-16	MIPS FPU emulator: allow Cause bits of FCSR to be writeable by ctc1	Shane McDonald	1	-1/+8
2010-02-27	MIPS: Add accessor functions and bit definitions for c0_PageGrain	David Daney	1	-0/+11
2010-02-27	MIPS: Decode c0_config4 for large TLBs.	David Daney	1	-0/+4
2010-01-28	MIPS: PowerTV: Fix support for timer interrupts with > 64 external IRQs	David VomLehn	1	-0/+12
2009-06-17	MIPS: Add hugetlbfs page defines.	David Daney	1	-0/+16
2009-05-14	MIPS: Fix sign-extension bug in 32-bit kernel on 32-bit hardware.	Ralf Baechle	1	-4/+4
2009-05-14	MIPS: Cavium: Add support for 8k and 32k page sizes.	Ralf Baechle	1	-0/+11
2009-05-14	MIPS: SMTC: Bring set/clear/change_c0_## return value semantics uptodate.	Kevin D. Kissell	1	-8/+11
2009-03-24	MIPS: Change {set,clear,change}_c0_<foo> to return old value.	Ralf Baechle	1	-11/+11
2009-01-11	MIPS: Override assembler target architecture for octeon.	David Daney	1	-0/+2
2009-01-11	MIPS: Add Cavium OCTEON specific register definitions to mipsregs.h	David Daney	1	-0/+20
2008-10-27	MIPS: Add CONFIG_CPU_R5500 for NEC VR5500 series processors	Shinya Kuribayashi	1	-0/+1
2008-10-11	MIPS: Move headfiles to new location below arch/mips/include	Ralf Baechle	1	-0/+1526