starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2019-05-30	treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 152	Thomas Gleixner	1	-5/+1
2017-11-03	Update MIPS email addresses	Paul Burton	1	-1/+1
2017-08-30	MIPS: CPS: Have asm/mips-cps.h include CM & CPC headers	Paul Burton	1	-3/+6
2017-08-30	MIPS: CPS: Add CM/CPC 3.5 register definitions	Paul Burton	1	-2/+20
2017-08-30	MIPS: CPC: Use BIT/GENMASK for register fields, order & drop shifts	Paul Burton	1	-37/+42
2017-08-30	MIPS: CPC: Use common CPS accessor generation macros	Paul Burton	1	-41/+22
2016-05-13	MIPS: CPC: Add start, stop and running CM3 CPC registers	Markos Chandras	1	-0/+3
2015-11-11	MIPS: CM: make use of mips_cm_{lock,unlock}_other	Paul Burton	1	-1/+2
2015-08-26	MIPS: CPC: Remove "weak" from mips_cpc_phys_base() and make it static	Bjorn Helgaas	1	-10/+0
2014-11-25	MIPS: Replace use of phys_t with phys_addr_t.	Ralf Baechle	1	-2/+2
2014-05-02	MIPS: CPC: provide locking functions	Paul Burton	1	-0/+27
2014-05-02	MIPS: CPC: provide functions to retrieve register addresses	Paul Burton	1	-1/+6
2014-03-31	MIPS: CPC: Use __raw_ memory access functions	Paul Burton	1	-2/+2
2014-03-07	MIPS: Add CPC probe, access functions	Paul Burton	1	-0/+150