summaryrefslogtreecommitdiff
path: root/arch/mips/include/asm/mach-cavium-octeon
AgeCommit message (Collapse)AuthorFilesLines
2019-08-07MIPS: octeon: Remove ARCH_HAS_IRQ_PER_CPUPaul Burton1-1/+0
ARCH_HAS_IRQ_PER_CPU is unused anywhere in the kernel - remove the definition. Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-08-07MIPS: octeon: Remove cpu_has_saaPaul Burton1-8/+0
The cpu_has_saa feature macro was added along with Cavium Octeon CPU support back in commit 5b3b16880f40 ("MIPS: Add Cavium OCTEON processor support files to arch/mips/cavium-octeon.") but has never been used. Remove the dead code. Signed-off-by: Paul Burton <paul.burton@mips.com>
2019-07-24MIPS: Remove unused R5432_CP0_INTERRUPT_WARPaul Burton1-1/+0
R5432_CP0_INTERRUPT_WAR is defined as 0 for every system we support, and so the workaround is never used. Remove the dead code. Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: linux-mips@vger.kernel.org
2018-06-24MIPS: Octeon: move swiotlb declarations out of dma-coherence.hChristoph Hellwig1-18/+0
No need to pull them into a global header. Signed-off-by: Christoph Hellwig <hch@lst.de> Patchwork: https://patchwork.linux-mips.org/patch/19538/ Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: David Daney <david.daney@cavium.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Tom Bogendoerfer <tsbogend@alpha.franken.de> Cc: Huacai Chen <chenhc@lemote.com> Cc: iommu@lists.linux-foundation.org Cc: linux-mips@linux-mips.org
2018-06-24MIPS: Octeon: remove mips dma-default stubsChristoph Hellwig1-48/+0
Octeon doesn't use the dma-default code, and now doesn't built it either, so these stubs can be removed. Signed-off-by: Christoph Hellwig <hch@lst.de> Patchwork: https://patchwork.linux-mips.org/patch/19537/ Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: David Daney <david.daney@cavium.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Tom Bogendoerfer <tsbogend@alpha.franken.de> Cc: Huacai Chen <chenhc@lemote.com> Cc: iommu@lists.linux-foundation.org Cc: linux-mips@linux-mips.org
2018-06-24MIPS: consolidate the swiotlb implementationsChristoph Hellwig1-11/+0
Octeon and Loongson share exactly the same code, move it into a common implementation, and use that implementation directly from get_arch_dma_ops. Also provide the expected dma-direct.h helpers directly instead of delegating to platform dma-coherence.h headers. Signed-off-by: Christoph Hellwig <hch@lst.de> Patchwork: https://patchwork.linux-mips.org/patch/19534/ Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: David Daney <david.daney@cavium.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Tom Bogendoerfer <tsbogend@alpha.franken.de> Cc: Huacai Chen <chenhc@lemote.com> Cc: iommu@lists.linux-foundation.org Cc: linux-mips@linux-mips.org
2018-06-24MIPS: Octeon: refactor swiotlb codeChristoph Hellwig1-2/+0
Share a common set of swiotlb operations, and to instead branch out in __phys_to_dma/__dma_to_phys for the PCI vs non-PCI case. Also use const structures for the PCI methods so that attackers can't use them as exploit vectors. Signed-off-by: Christoph Hellwig <hch@lst.de> Patchwork: https://patchwork.linux-mips.org/patch/19532/ Signed-off-by: Paul Burton <paul.burton@mips.com> Cc: Florian Fainelli <f.fainelli@gmail.com> Cc: David Daney <david.daney@cavium.com> Cc: Kevin Cernekee <cernekee@gmail.com> Cc: Jiaxun Yang <jiaxun.yang@flygoat.com> Cc: Tom Bogendoerfer <tsbogend@alpha.franken.de> Cc: Huacai Chen <chenhc@lemote.com> Cc: iommu@lists.linux-foundation.org Cc: linux-mips@linux-mips.org
2018-03-20dma/direct: Handle the memory encryption bit in common codeChristoph Hellwig1-2/+2
Give the basic phys_to_dma() and dma_to_phys() helpers a __-prefix and add the memory encryption mask to the non-prefixed versions. Use the __-prefixed versions directly instead of clearing the mask again in various places. Tested-by: Tom Lendacky <thomas.lendacky@amd.com> Signed-off-by: Christoph Hellwig <hch@lst.de> Reviewed-by: Thomas Gleixner <tglx@linutronix.de> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Joerg Roedel <joro@8bytes.org> Cc: Jon Mason <jdmason@kudzu.us> Cc: Konrad Rzeszutek Wilk <konrad.wilk@oracle.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Muli Ben-Yehuda <mulix@mulix.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: iommu@lists.linux-foundation.org Link: http://lkml.kernel.org/r/20180319103826.12853-13-hch@lst.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
2018-01-10dma-mapping: move swiotlb arch helpers to a new headerChristoph Hellwig1-0/+8
phys_to_dma, dma_to_phys and dma_capable are helpers published by architecture code for use of swiotlb and xen-swiotlb only. Drivers are not supposed to use these directly, but use the DMA API instead. Move these to a new asm/dma-direct.h helper, included by a linux/dma-direct.h wrapper that provides the default linear mapping unless the architecture wants to override it. In the MIPS case the existing dma-coherent.h is reused for now as untangling it will take a bit of work. Signed-off-by: Christoph Hellwig <hch@lst.de> Acked-by: Robin Murphy <robin.murphy@arm.com>
2017-08-29MIPS: Octeon: Expose support for mips32r1, mips32r2 and mips64r1Petar Jovanovic1-3/+3
Define Cavium Octeon as a CPU that has support for mips32r1, mips32r2 and mips64r1. This will affect show_cpuinfo() that will now correctly expose mips32r1, mips32r2 and mips64r1 as supported ISAs. Signed-off-by: Petar Jovanovic <petar.jovanovic@rt-rk.com> Reviewed-by: Maciej W. Rozycki <macro@imgtec.com> Acked-by: David Daney <david.daney@cavium.com> Cc: petar.jovanovic@imgtec.com Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/15749/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2017-02-26Merge tag 'for-next-dma_ops' of ↵Linus Torvalds1-1/+1
git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma Pull rdma DMA mapping updates from Doug Ledford: "Drop IB DMA mapping code and use core DMA code instead. Bart Van Assche noted that the ib DMA mapping code was significantly similar enough to the core DMA mapping code that with a few changes it was possible to remove the IB DMA mapping code entirely and switch the RDMA stack to use the core DMA mapping code. This resulted in a nice set of cleanups, but touched the entire tree and has been kept separate for that reason." * tag 'for-next-dma_ops' of git://git.kernel.org/pub/scm/linux/kernel/git/dledford/rdma: (37 commits) IB/rxe, IB/rdmavt: Use dma_virt_ops instead of duplicating it IB/core: Remove ib_device.dma_device nvme-rdma: Switch from dma_device to dev.parent RDS: net: Switch from dma_device to dev.parent IB/srpt: Modify a debug statement IB/srp: Switch from dma_device to dev.parent IB/iser: Switch from dma_device to dev.parent IB/IPoIB: Switch from dma_device to dev.parent IB/rxe: Switch from dma_device to dev.parent IB/vmw_pvrdma: Switch from dma_device to dev.parent IB/usnic: Switch from dma_device to dev.parent IB/qib: Switch from dma_device to dev.parent IB/qedr: Switch from dma_device to dev.parent IB/ocrdma: Switch from dma_device to dev.parent IB/nes: Remove a superfluous assignment statement IB/mthca: Switch from dma_device to dev.parent IB/mlx5: Switch from dma_device to dev.parent IB/mlx4: Switch from dma_device to dev.parent IB/i40iw: Remove a superfluous assignment statement IB/hns: Switch from dma_device to dev.parent ...
2017-01-24treewide: Constify most dma_map_ops structuresBart Van Assche1-1/+1
Most dma_map_ops structures are never modified. Constify these structures such that these can be write-protected. This patch has been generated as follows: git grep -l 'struct dma_map_ops' | xargs -d\\n sed -i \ -e 's/struct dma_map_ops/const struct dma_map_ops/g' \ -e 's/const struct dma_map_ops {/struct dma_map_ops {/g' \ -e 's/^const struct dma_map_ops;$/struct dma_map_ops;/' \ -e 's/const const struct dma_map_ops /const struct dma_map_ops /g'; sed -i -e 's/const \(struct dma_map_ops intel_dma_ops\)/\1/' \ $(git grep -l 'struct dma_map_ops intel_dma_ops'); sed -i -e 's/const \(struct dma_map_ops dma_iommu_ops\)/\1/' \ $(git grep -l 'struct dma_map_ops' | grep ^arch/powerpc); sed -i -e '/^struct vmd_dev {$/,/^};$/ s/const \(struct dma_map_ops[[:blank:]]dma_ops;\)/\1/' \ -e '/^static void vmd_setup_dma_ops/,/^}$/ s/const \(struct dma_map_ops \*dest\)/\1/' \ -e 's/const \(struct dma_map_ops \*dest = \&vmd->dma_ops\)/\1/' \ drivers/pci/host/*.c sed -i -e '/^void __init pci_iommu_alloc(void)$/,/^}$/ s/dma_ops->/intel_dma_ops./' arch/ia64/kernel/pci-dma.c sed -i -e 's/static const struct dma_map_ops sn_dma_ops/static struct dma_map_ops sn_dma_ops/' arch/ia64/sn/pci/pci_dma.c sed -i -e 's/(const struct dma_map_ops \*)//' drivers/misc/mic/bus/vop_bus.c Signed-off-by: Bart Van Assche <bart.vanassche@sandisk.com> Reviewed-by: Christoph Hellwig <hch@lst.de> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Boris Ostrovsky <boris.ostrovsky@oracle.com> Cc: David Woodhouse <dwmw2@infradead.org> Cc: Juergen Gross <jgross@suse.com> Cc: H. Peter Anvin <hpa@zytor.com> Cc: Ingo Molnar <mingo@redhat.com> Cc: linux-arch@vger.kernel.org Cc: linux-kernel@vger.kernel.org Cc: Russell King <linux@armlinux.org.uk> Cc: x86@kernel.org Signed-off-by: Doug Ledford <dledford@redhat.com>
2017-01-03MIPS: Octeon: Enable KASLRSteven J. Hill1-2/+13
This patch enables KASLR for Octeon systems. The SMP startup code is such that the secondaries monitor the volatile variable 'octeon_processor_relocated_kernel_entry' for any non-zero value. The 'plat_post_relocation hook' is used to set that value to the kernel entry point of the relocated kernel. The secondary CPUs will then jusmp to the new kernel, perform their initialization again and begin waiting for the boot CPU to start them via the relocated loop 'octeon_spin_wait_boot'. Inspired by Steven's code from Cavium. Signed-off-by: Matt Redfearn <matt.redfearn@imgtec.com> Signed-off-by: Steven J. Hill <steven.hill@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14669/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-09-19MIPS: Octeon: mangle-port: fix build failure with VDSO codeAaro Koskinen1-2/+2
Commit 1685ddbe35cd ("MIPS: Octeon: Changes to support readq()/writeq() usage.") added bitwise shift operations that assume that unsigned long is always 64-bits. This broke the build of VDSO code, as it gets compiled also in "faked" 32-bit mode. Althought the failing inline functions are never executed in 32-bit mode, they still need to pass the compilation. Fix by using 64-bit types explicitly. The patch fixes the following build failure: CC arch/mips/vdso/gettimeofday-o32.o In file included from los/git/devel/linux/arch/mips/include/asm/io.h:32:0, from los/git/devel/linux/arch/mips/include/asm/page.h:194, from los/git/devel/linux/arch/mips/vdso/vdso.h:26, from los/git/devel/linux/arch/mips/vdso/gettimeofday.c:11: los/git/devel/linux/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h: In function '__should_swizzle_bits': los/git/devel/linux/arch/mips/include/asm/mach-cavium-octeon/mangle-port.h:19:40: error: right shift count >= width of type [-Werror=shift-count-overflow] unsigned long did = ((unsigned long)a >> 40) & 0xff; ^~ Fixes: 1685ddbe35cd ("MIPS: Octeon: Changes to support readq()/writeq() usage.") Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi> Acked-by: David Daney <ddaney@caviumnetworks.com> Cc: David Daney <david.daney@cavium.com> Cc: Steven J. Hill <steven.hill@cavium.com> Cc: Alex Smith <alex.smith@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/14039/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-08-06Merge branch 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linusLinus Torvalds2-31/+13
Pull MIPS updates from Ralf Baechle: "This is the main pull request for MIPS for 4.8. Also includes is a minor SSB cleanup as SSB code traditionally is merged through the MIPS tree: ATH25: - MIPS: Add default configuration for ath25 Boot: - For zboot, copy appended dtb to the end of the kernel - store the appended dtb address in a variable BPF: - Fix off by one error in offset allocation Cobalt code: - Fix typos Core code: - debugfs_create_file returns NULL on error, so don't use IS_ERR for testing for errors. - Fix double locking issue in RM7000 S-cache code. This would only affect RM7000 ARC systems on reboot. - Fix page table corruption on THP permission changes. - Use compat_sys_keyctl for 32 bit userspace on 64 bit kernels. David says, there are no compatibility issues raised by this fix. - Move some signal code around. - Rewrite r4k count/compare clockevent device registration such that min_delta_ticks/max_delta_ticks files are guaranteed to be initialized. - Only register r4k count/compare as clockevent device if we can assume the clock to be constant. - Fix MSA asm warnings in control reg accessors - uasm and tlbex fixes and tweaking. - Print segment physical address when EU=1. - Define AT_VECTOR_SIZE_ARCH for ARCH_DLINFO. - CP: Allow booting by VP other than VP 0 - Cache handling fixes and optimizations for r4k class caches - Add hotplug support for R6 processors - Cleanup hotplug bits in kconfig - traps: return correct si code for accessing nonmapped addresses - Remove cpu_has_safe_index_cacheops Lantiq: - Register IRQ handler for virtual IRQ number - Fix EIU interrupt loading code - Use the real EXIN count - Fix build error. Loongson 3: - Increase HPET_MIN_PROG_DELTA and decrease HPET_MIN_CYCLES Octeon: - Delete built-in DTB pruning code for D-Link DSR-1000N. - Clean up GPIO definitions in dlink_dsr-1000n.dts. - Add more LEDs to the DSR-100n DTS - Fix off by one in octeon_irq_gpio_map() - Typo fixes - Enable SATA by default in cavium_octeon_defconfig - Support readq/writeq() - Remove forced mappings of USB interrupts. - Ensure DMA descriptors are always in the low 4GB - Improve USB reset code for OCTEON II. Pistachio: - Add maintainers entry for pistachio SoC Support - Remove plat_setup_iocoherency Ralink: - Fix pwm UART in spis group pinmux. SSB: - Change bare unsigned to unsigned int to suit coding style Tools: - Fix reloc tool compiler warnings. Other: - Delete use of ARCH_WANT_OPTIONAL_GPIOLIB" * 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (61 commits) MIPS: mm: Fix definition of R6 cache instruction MIPS: tools: Fix relocs tool compiler warnings MIPS: Cobalt: Fix typo MIPS: Octeon: Fix typo MIPS: Lantiq: Fix build failure MIPS: Use CPHYSADDR to implement mips32 __pa MIPS: Octeon: Dlink_dsr-1000n.dts: add more leds. MIPS: Octeon: Clean up GPIO definitions in dlink_dsr-1000n.dts. MIPS: Octeon: Delete built-in DTB pruning code for D-Link DSR-1000N. MIPS: store the appended dtb address in a variable MIPS: ZBOOT: copy appended dtb to the end of the kernel MIPS: ralink: fix spis group pinmux MIPS: Factor o32 specific code into signal_o32.c MIPS: non-exec stack & heap when non-exec PT_GNU_STACK is present MIPS: Use per-mm page to execute branch delay slot instructions MIPS: Modify error handling MIPS: c-r4k: Use SMP calls for CM indexed cache ops MIPS: c-r4k: Avoid small flush_icache_range SMP calls MIPS: c-r4k: Local flush_icache_range cache op override MIPS: c-r4k: Split r4k_flush_kernel_vmap_range() ...
2016-07-28MIPS: Octeon: Remove forced mappings of USB interrupts.Steven J. Hill1-2/+0
Get rid of unnecessary forced interrupt mappings for the USB host controller on OCTEON II. Signed-off-by: Steven J. Hill <steven.hill@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13824/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-07-11MIPS: Octeon: Changes to support readq()/writeq() usage.Steven J. Hill1-29/+13
Update OCTEON port mangling code to support readq() and writeq() functions to allow driver code to be more portable. Updates also for word and long function pairs. We also remove SWAP_IO_SPACE for OCTEON platforms as the function macros are redundant with the new mangling code. Signed-off-by: Steven J. Hill <steven.hill@cavium.com> Acked-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13780/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2016-06-16MIPS: Clean up RDHWR handlingJames Hogan1-1/+1
No preprocessor definitions are used in the handling of the registers accessible with the RDHWR instruction, nor the corresponding bits in the CP0 HWREna register. Add definitions for both the register numbers (MIPS_HWR_*) and HWREna bits (MIPS_HWRENA_*) in asm/mipsregs.h and make use of them in the initialisation of HWREna and emulation of the RDHWR instruction. Signed-off-by: James Hogan <james.hogan@imgtec.com> Acked-by: Ralf Baechle <ralf@linux-mips.org> Cc: David Daney <david.daney@cavium.com> Cc: Paolo Bonzini <pbonzini@redhat.com> Cc: Radim Krčmář <rkrcmar@redhat.com> Cc: linux-mips@linux-mips.org Cc: kvm@vger.kernel.org Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
2016-04-03MIPS: Fix misspellings in comments.Adam Buchbinder1-1/+1
Signed-off-by: Adam Buchbinder <adam.buchbinder@gmail.com> Cc: linux-mips@linux-mips.org Cc: trivial@kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12617/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-09-03MIPS: Remove all the uses of custom gpio.hAlban Bedel1-21/+0
Currently CONFIG_ARCH_HAVE_CUSTOM_GPIO_H is defined for all MIPS machines, and each machine type provides its own gpio.h. However only a handful really implement the GPIO API, most just forward everythings to gpiolib. The Alchemy machine is notable as it provides a system to allow implementing the GPIO API at the board level. But it is not used by any board currently supported, so it can also be removed. For most machine types we can just remove the custom gpio.h, as well as the custom wrappers if some exists. Some of the code found in the wrappers must be moved to the respective GPIO driver. A few more fixes are need in some drivers as they rely on linux/gpio.h to provides some machine specific definitions, or used asm/gpio.h instead of linux/gpio.h for the gpio API. Signed-off-by: Alban Bedel <albeu@free.fr> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-mips@linux-mips.org Cc: Hauke Mehrtens <hauke@hauke-m.de> Cc: Rafał Miłecki <zajec5@gmail.com> Cc: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com> Cc: Tejun Heo <tj@kernel.org> Cc: Alexandre Courbot <gnurou@gmail.com> Cc: Dmitry Torokhov <dmitry.torokhov@gmail.com> Cc: Florian Fainelli <florian@openwrt.org> Cc: Manuel Lauss <manuel.lauss@gmail.com> Cc: Joe Perches <joe@perches.com> Cc: Daniel Walter <dwalter@google.com> Cc: Sergey Ryazanov <ryazanov.s.a@gmail.com> Cc: Huacai Chen <chenhc@lemote.com> Cc: James Hartley <james.hartley@imgtec.com> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Jiri Kosina <jkosina@suse.cz> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: Wolfram Sang <wsa@the-dreams.de> Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Varka Bhadram <varkabhadram@gmail.com> Cc: Masanari Iida <standby24x7@gmail.com> Cc: Tomi Valkeinen <tomi.valkeinen@ti.com> Cc: Michael Buesch <m@bues.ch> Cc: abdoulaye berthe <berthe.ab@gmail.com> Cc: linux-kernel@vger.kernel.org Cc: linux-ide@vger.kernel.org Cc: linux-gpio@vger.kernel.org Cc: linux-input@vger.kernel.org Cc: netdev@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/10828/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-13Merge branch '4.0-fixes' into mips-for-linux-nextRalf Baechle1-1/+0
2015-04-10MIPS: Octeon: Delete override of cpu_has_mips_r2_exec_hazard.Ralf Baechle1-1/+0
This is no longer needed with the fixed, new and improved definition of cpu_has_mips_r2_exec_hazard in <asm/cpu-features.h>. For a discussion, see http://patchwork.linux-mips.org/patch/9539/. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-01MIPS: DMA: Implement platform hook to perform post-DMA cache flushes.Ralf Baechle1-0/+4
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-04-01MIPS: OCTEON: Add mach-cavium-octeon/mangle-port.hDavid Daney1-0/+74
Needed for little-endian ioport access. This fixes NOR flash in little-endian mode Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/9591/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20MIPS: OCTEON: More OCTEONIII supportChandrakala Chavva1-0/+3
Read clock rate from the correct CSR. Don't clear COP0_DCACHE for OCTEONIII. Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8945/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20MIPS: OCTEON: Remove setting of processor specific CVMCTL icache bits.Chad Reese1-20/+0
CN38XX pass 1 required icache prefetching to be turned off. This chip never reached production and is long dead. Other processor specific icache settings are done by the bootloader. Remove these bits from the kernel. Signed-off-by: Chad Reese <kreese@caviumnetworks.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Cc: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/8944/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20MIPS: OCTEON: Core-15169 Workaround and general CVMSEG cleanup.David Daney1-3/+16
Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8943/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20MIPS: OCTEON: Implement DCache errata workaround for all CN6XXXDavid Daney1-0/+3
Make messages refer to all CN6XXX. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8941/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2015-02-20MIPS: OCTEON: Implement the core-16057 workaroundDavid Daney1-0/+22
Disable ICache prefetch for certian Octeon II processors. Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Aleksey Makarov <aleksey.makarov@auriga.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8938/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-09-22MIPS: Use WSBH/DSBH/DSHD on Loongson 3AChen Jie1-0/+1
Signed-off-by: chenj <chenj@lemote.com> Cc: linux-mips@linux-mips.org Cc: chenhc@lemote.com Patchwork: https://patchwork.linux-mips.org/patch/7542/ Patchwork: https://patchwork.linux-mips.org/patch/7550/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-06-05MIPS: Octeon: Add twsi interrupt initialization for OCTEON 3XXX, 5XXX, 63XXEunbong Song1-0/+2
In octeon_3xxx.dts file, there is a definiton for twsi/twsi2 interrupts. But there is no code for initialization of this interrupts. This patch adds code for initialization of twsi interrupts. Signed-off-by: Eunbong Song <eunb.song@samsung.com> Cc: linux-kernel@vger.kernel.org Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/6816/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2014-05-30MIPS: OCTEON: Enable use of FPUDavid Daney1-1/+0
Some versions of the assembler will not assemble CFC1 for OCTEON, so override the ISA for these. Add r4k_fpu.o to handle low level FPU initialization. Modify octeon_switch.S to save the FPU registers. And include r4k_switch.S to pick up more FPU support. Get rid of "#define cpu_has_fpu 0" Signed-off-by: David Daney <david.daney@cavium.com> Signed-off-by: Andreas Herrmann <andreas.herrmann@caviumnetworks.com> Cc: linux-mips@linux-mips.org Cc: James Hogan <james.hogan@imgtec.com> Cc: kvm@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/7006/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-10-30MIPS: Remove unnecessary platform dma helper functionsFelix Fietkau1-12/+0
The semantics stay the same - on Cavium Octeon the functions were dead code (it overrides the MIPS DMA ops) - on other platforms they contained no code at all. Signed-off-by: Felix Fietkau <nbd@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5720/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-08-26MIPS: OCTEON: Select ARCH_REQUIRE_GPIOLIBDavid Daney1-0/+21
... and create asm/mach-cavium-octeon/gpio.h so that things continue to build. This allows us to use the existing I2C connected GPIO expanders. Signed-off-by: David Daney <david.daney@cavium.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Cc: linux-gpio@vger.kernel.org Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/5632/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-07-12Merge branch '3.10-fixes' into mips-for-linux-nextRalf Baechle2-0/+31
This that should have been fixed but weren't, way to much, intrusive and late.
2013-06-21MIPS/OCTEON: Override default address space layout.David Daney1-0/+24
OCTEON II cannot execute code in the default CAC_BASE space, so we supply a value (0x8000000000000000) that does work. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5457/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-18MIPS: Octeon: Fix build error if CONFIG_BUG=nDavid Daney1-0/+7
CC init/do_mounts.o In file included from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/dma-mapping.h:10:0, from include/linux/dma-mapping.h:76, from include/linux/skbuff.h:33, from include/linux/icmpv6.h:4, from include/linux/ipv6.h:59, from include/net/ipv6.h:16, from include/linux/sunrpc/clnt.h:26, from include/linux/nfs_fs.h:30, from init/do_mounts.c:30: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:24:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem_page’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:30:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_addr_to_phys’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:36:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_supported’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:47:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_mapping_error’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:63:1: warning: no return statement in function returning non-void [-Wreturn-type] LD init/mounts.o CC init/init_task.o In file included from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/dma-mapping.h:10:0, from include/linux/dma-mapping.h:76, from include/linux/skbuff.h:33, from include/linux/netfilter.h:5, from include/net/netns/netfilter.h:5, from include/net/net_namespace.h:20, from include/linux/init_task.h:14, from init/init_task.c:1: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:24:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem_page’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:30:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_addr_to_phys’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:36:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_supported’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:47:1: warning: no return statement in function returning non-void [-Wreturn-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_mapping_error’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:63:1: warning: no return statement in function returning non-void [-Wreturn-type] LD init/built-in.o CC arch/mips/cavium-octeon/setup.o In file included from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/dma-mapping.h:10:0, from include/linux/dma-mapping.h:76, from include/asm-generic/pci-dma-compat.h:7, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/pci.h:129, from include/linux/pci.h:1451, from /home/ralf/src/linux/linux-mips/arch/mips/include/asm/octeon/pci-octeon.h:12, from arch/mips/cavium-octeon/setup.c:41: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:24:1: error: no return statement in function returning non-void [-Werror=return-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_map_dma_mem_page’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:30:1: error: no return statement in function returning non-void [-Werror=return-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_addr_to_phys’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:36:1: error: no return statement in function returning non-void [-Werror=return-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_supported’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:47:1: error: no return statement in function returning non-void [-Werror=return-type] /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h: In function ‘plat_dma_mapping_error’: /home/ralf/src/linux/linux-mips/arch/mips/include/asm/mach-cavium-octeon/dma-coherence.h:63:1: error: no return statement in function returning non-void [-Werror=return-type] cc1: all warnings being treated as errors make[2]: *** [arch/mips/cavium-octeon/setup.o] Error 1 make[1]: *** [arch/mips/cavium-octeon] Error 2 make: *** [arch/mips] Error 2 [ralf@linux-mips.org: while at it, also include <linux/bug.h> directly.] Signed-off-by: David Daney <david.daney@cavium.com> Patchwork: https://patchwork.linux-mips.org/patch/5519/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-06-10MIPS: OCTEON: Get rid of CONFIG_CAVIUM_OCTEON_HW_FIX_UNALIGNEDDavid Daney1-6/+1
When you turn it off, the kernel is unusable, so get rid of the option and always allow unaligned access. The Octeon specific memcpy intentionally does unaligned accesses and it must not fault. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/5303/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle2-20/+20
Having received another series of whitespace patches I decided to do this once and for all rather than dealing with this kind of patches trickling in forever. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-12-13MIPS: PMC-Sierra Yosemite: Remove support.Ralf Baechle1-1/+0
Nobody seems to be interested anymore and upstream also never had an ethernet driver. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-12-13MIPS/OCTEON/ata: Convert pata_octeon_cf.c to use device tree.David Daney1-1/+0
The patch needs to eliminate the definition of OCTEON_IRQ_BOOTDMA so that the device tree code can map the interrupt, so in order to not temporarily break things, we do a single patch to both the interrupt registration code and the pata_octeon_cf driver. Also rolled in is a conversion to use hrtimers and corrections to the timing calculations. Acked-by: Jeff Garzik <jgarzik@redhat.com> Signed-off-by: David Daney <david.daney@cavium.com>
2012-10-11MIPS: Hardwire detection of DSP ASE Rev 2 for systems, as required.Ralf Baechle1-0/+1
Most supported systems currently hardwire cpu_has_dsp to 0, so we also can disable support for cpu_has_dsp2 resulting in a slightly smaller kernel. Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-09-28Merge branch 'rixi-3.7' of ↵Ralf Baechle1-1/+1
git://git.linux-mips.org/pub/scm/sjhill/linux-sjhill into mips-for-linux-next
2012-09-14MIPS: Replace 'kernel_uses_smartmips_rixi' with 'cpu_has_rixi'.Steven J. Hill1-1/+1
Remove usage of the 'kernel_uses_smartmips_rixi' macro from all files and use new 'cpu_has_rixi' instead. Signed-off-by: Steven J. Hill <sjhill@mips.com> Acked-by: David Daney <david.daney@cavium.com>
2012-08-31MIPS: OCTEON: Add OCTEON_IRQ_* definitions for cn68XX chips.David Daney1-3/+4
There are 64 workqueue, 32 watchdog, and 4 mbox. Signed-off-by: David Daney <david.daney@cavium.com>
2012-08-17MIPS: Octeon: Fix broken interrupt controller code.David Daney1-9/+1
Since 3.6.0-rc1, We are getting many messages like: WARNING: at kernel/irq/irqdomain.c:444 irq_domain_associate_many+0x23c/0x260() Modules linked in: Call Trace: [<ffffffff814cb698>] dump_stack+0x8/0x34 [<ffffffff81133d00>] warn_slowpath_common+0x78/0xa8 [<ffffffff81187e44>] irq_domain_associate_many+0x23c/0x260 [<ffffffff81187f38>] irq_create_mapping+0xd0/0x220 [<ffffffff81188104>] irq_create_of_mapping+0x7c/0x158 [<ffffffff813e5f08>] irq_of_parse_and_map+0x28/0x40 . . . Both the CIU and GPIO interrupt domains were somewhat screwed up. For the CIU domain, we need to call irq_domain_associate() for each of the preassigned irq numbers. For the GPIO domain, we were applying the register bit offset in octeon_irq_gpio_xlat, but it should be done in octeon_irq_gpio_map instead. Also: Reserve all 8 'core' irqs for the 'core' irq_chip so that they don't get used by the other domains. Remove unused OCTEON_IRQ_* symbols. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/4190/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: OCTEON: Remove unneeded OCTEON_IRQ_* defines.David Daney1-38/+2
The follow-on patch to add irq_domain support will be the supported method for using these irq lines, so get these defines out of the way in preperation for that. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3930/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2012-07-23MIPS: Octeon: Remove use of OCTEON_IRQ_RST.David Daney1-2/+3
This symbol will be removed, so don't use it as part of the definition of OCTEON_IRQ_LAST. Set OCTEON_IRQ_LAST to 127 so there is space for all the automatically allocated (via irq_domain) irqs. Signed-off-by: David Daney <david.daney@cavium.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3946/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-09-24MIPS: Octeon: Enable C0_UserLocal probing.David Daney1-1/+0
Octeon2 processor cores have a UserLocal register. Remove the hard coded negative probe and allow the standard probing to detect this feature. Signed-off-by: David Daney <david.daney@cavium.com> To: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/2578/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2011-05-19Octeon: Fix interrupt irq settings for performance counters.Chandrakala Chavva1-0/+5
Octeon uses different interrupt irq for timer and performance counters. Set CvmCtl[IPPCI] to correct irq value very early. Signed-off-by: Chandrakala Chavva <cchavva@caviumnetworks.com> Signed-off-by: David Daney <ddaney@caviumnetworks.com> To: linux-mips@linux-mips.org Cc: Chandrakala Chavva <cchavva@caviumnetworks.com> Patchwork: https://patchwork.linux-mips.org/patch/2085/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
generated by cgit v1.2.3 (git 2.39.0) at 2024-12-13 09:56:36 +0300