starfive-tech/linux.git - StarFive Tech Linux Kernel for VisionFive (JH7110) boards (mirror)

Age	Commit message (Expand)	Author	Files	Lines
2020-01-23	MIPS: Loongson64: Bump ISA level to MIPSR2	Jiaxun Yang	1	-2/+2
2019-11-11	MIPS: Loongson: Unify LOONGSON3/LOONGSON64 Kconfig usage	Huacai Chen	1	-2/+2
2019-11-01	MIPS: Loongson64: Rename CPU TYPES	Jiaxun Yang	1	-2/+2
2018-11-09	MIPS: Avoid using .set mips0 to restore ISA	Paul Burton	1	-2/+4
2016-05-28	MIPS: hazards.h: Fix typo	Andrea Gelmini	1	-4/+4
2016-05-13	MIPS: Loongson-3: Introduce CONFIG_LOONGSON3_ENHANCEMENT	Huacai Chen	1	-3/+4
2015-06-21	MIPS: hazards: Add hazard macros for tlb read	James Hogan	1	-0/+52
2015-02-17	MIPS: asm: hazards: Add MIPSR6 definitions	Markos Chandras	1	-4/+5
2013-04-11	MIPS: Get rid of the use of .macro in C code.	Ralf Baechle	1	-128/+243
2013-02-21	Merge branch 'mips-next-3.9' of git://git.linux-mips.org/pub/scm/john/linux-j...	Ralf Baechle	1	-1/+1
2013-02-17	MIPS: Netlogic: No hazards needed for XLR/XLS	Jayachandran C	1	-1/+1
2013-02-01	MIPS: Whitespace cleanup.	Ralf Baechle	1	-3/+3
2012-12-13	MIPS: PMC-Sierra Yosemite: Remove support.	Ralf Baechle	1	-25/+0
2011-12-08	MIPS: BMIPS: Add CFLAGS, Makefile entries for BMIPS	Kevin Cernekee	1	-1/+2
2011-12-08	MIPS: Clean up whitespace warning in hazards.h	Kevin Cernekee	1	-2/+2
2010-08-05	MIPS: Alchemy: remove SOC_AU1X00 in favor of MIPS_ALCHEMY	Manuel Lauss	1	-2/+2
2009-05-14	MIPS: Loongson 2 needs no hazard barriers.	Zhang Le	1	-2/+3
2009-03-30	MIPS: Alchemy: MIPS hazard workarounds are not required.	Manuel Lauss	1	-2/+2
2009-03-11	MIPS: NEC VR5500 processor support fixup	Shinya Kuribayashi	1	-1/+2
2009-01-11	MIPS: For Cavium OCTEON handle hazards as per the R10000 handling.	David Daney	1	-2/+2
2008-10-11	MIPS: Move headfiles to new location below arch/mips/include	Ralf Baechle	1	-0/+271