summaryrefslogtreecommitdiff
path: root/arch/mips/cavium-octeon/octeon-irq.c
AgeCommit message (Expand)AuthorFilesLines
2016-09-29MIPS: Octeon: mark GPIO controller node not populated after IRQ init.Steven J. Hill1-0/+6
2016-08-03Merge branch '4.7-fixes' into mips-for-linux-nextRalf Baechle1-1/+1
2016-07-28MIPS: Octeon: Remove forced mappings of USB interrupts.Steven J. Hill1-12/+0
2016-07-21MIPS: Octeon: Off by one in octeon_irq_gpio_map()Dan Carpenter1-1/+1
2016-05-13MIPS: OCTEON: Simplify code in octeon_irq_ciu_gpio_set_type()David Daney1-1/+1
2016-05-13MIPS: OCTEON: Add support for OCTEON III interrupt controller.David Daney1-1/+649
2016-05-13MIPS: OCTEON: Remove some code limiting NR_IRQS to 255David Daney1-25/+2
2015-10-13irqdomain: Use irq_domain_get_of_node() instead of direct field accessMarc Zyngier1-2/+2
2015-09-16genirq: Remove irq argument from irq flow handlersThomas Gleixner1-1/+1
2015-08-26MIPS: octeon: Replace the homebrewn flow handlerThomas Gleixner1-11/+11
2015-08-26MIPS: irq: Use access helper irq_data_get_affinity_mask()Jiang Liu1-6/+8
2015-06-21MIPS, IRQ: Use irq_desc_get_xxx() to avoid redundant lookup of irq_descJiang Liu1-1/+3
2015-02-20MIPS: OCTEON: irq: add CIB and other fixesDavid Daney1-269/+780
2015-02-20MIPS: OCTEON: Don't do acknowledge operations for level triggered irqs.David Daney1-2/+43
2015-02-20MIPS: OCTEON: Update octeon-model.h code for new SoCs.David Daney1-1/+1
2014-10-27MIPS: Octeon: Make Octeon GPIO IRQ chip CPU hotplug-awareAlexander Sverdlin1-0/+2
2014-08-26mips: Replace __get_cpu_var usesChristoph Lameter1-15/+15
2014-06-05MIPS: Octeon: Add twsi interrupt initialization for OCTEON 3XXX, 5XXX, 63XXEunbong Song1-0/+2
2014-04-18genirq: Allow forcing cpu affinity of interruptsThomas Gleixner1-1/+1
2014-03-20MIPS: Octeon: Fix warning in of_device_alloc on cn3xxxAndreas Herrmann1-10/+12
2013-09-03MIPS: Move declaration of Octeon function fixup_irqs() to header.Ralf Baechle1-1/+1
2013-07-15MIPS: Delete __cpuinit/__CPUINIT usage from MIPS codePaul Gortmaker1-6/+6
2013-06-25MIPS: octeon: Use irq_get_trigger_type() to get IRQ flagsJavier Martinez Canillas1-1/+1
2013-05-08MIPS: octeon: Fix GPIO number in IRQ chip private dataAlexander Sverdlin1-3/+2
2013-02-01MIPS: Whitespace cleanup.Ralf Baechle1-2/+2
2012-12-13MIPS/OCTEON/ata: Convert pata_octeon_cf.c to use device tree.David Daney1-1/+0
2012-08-31MIPS: OCTEON: Register ciu/ciu2 as the default irq_domain.David Daney1-0/+2
2012-08-31MIPS: Octeon: Make interrupt controller work with threaded handlers.David Daney1-143/+137
2012-08-31MIPS: OCTEON: Add support for cn68XX interrupt controller.David Daney1-24/+544
2012-08-17MIPS: Octeon: Fix broken interrupt controller code.David Daney1-46/+43
2012-07-23MIPS: Octeon: Use device tree to register serial ports.David Daney1-4/+0
2012-07-23netdev: octeon_mgmt: Convert to use device tree.David Daney1-2/+0
2012-07-23i2c: Convert i2c-octeon.c to use device tree.David Daney1-2/+0
2012-07-23MIPS: Octeon: Setup irq_domains for interrupts.David Daney1-9/+206
2012-07-23MIPS: OCTEON: Consolidate the edge and level irq_chip structures.David Daney1-28/+2
2012-07-23MIPS: OCTEON: Remove unneeded OCTEON_IRQ_* defines.David Daney1-43/+0
2012-07-23MIPS: Octeon: Add irq handlers for GPIO interrupts.David Daney1-1/+110
2011-03-29MIPS: Octeon: Simplify irq_cpu_on/offline irq chip functionsThomas Gleixner1-54/+17
2011-03-29MIPS: Octeon: Rewrite interrupt handling code.David Daney1-607/+815
2010-08-05MIPS: Octeon: Fix fixup_irqs for HOTPLUG_CPUDavid Daney1-39/+69
2010-08-05MIPS: Octeon: Improve interrupt handling.David Daney1-100/+256
2010-08-05MIPS: Octeon: Move MSI code out of octeon-irq.c.David Daney1-93/+0
2010-02-27MIPS: Octeon: Replace rwlocks in irq_chip handlers with raw_spinlocks.David Daney1-28/+14
2010-02-27MIPS: Octeon: Convert octeon_irq_msi_lock to raw spinlock.Ralf Baechle1-5/+5
2010-02-27MIPS: Make various locks static.Ralf Baechle1-1/+2
2010-02-27MIPS: Octeon: Do proper acknowledgment of CIU timer interrupts.David Daney1-4/+63
2010-02-27MIPS: Octeon: Fix EOI handling.David Daney1-6/+34
2009-11-02MIPS: Octeon: Use lockless interrupt controller operations when possible.David Daney1-36/+178
2009-11-02MIPS: Octeon: Use write_{un,}lock_irq{restore,save} to set irq affinityDavid Daney1-4/+6
2009-06-24MIPS: Cavium: Add CPU hotplugging code.Ralf Baechle1-0/+59